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	Merge pull request #1013 from lioncash/unused
dyncom: Remove an unused variable
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						ea1b04f5da
					
				
					 1 changed files with 0 additions and 3 deletions
				
			
		|  | @ -3886,7 +3886,6 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | ||||||
| #endif | #endif | ||||||
|     arm_inst* inst_base; |     arm_inst* inst_base; | ||||||
|     unsigned int addr; |     unsigned int addr; | ||||||
|     unsigned int phys_addr; |  | ||||||
|     unsigned int num_instrs = 0; |     unsigned int num_instrs = 0; | ||||||
| 
 | 
 | ||||||
|     int ptr; |     int ptr; | ||||||
|  | @ -3905,8 +3904,6 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) { | ||||||
|         else |         else | ||||||
|             cpu->Reg[15] &= 0xfffffffc; |             cpu->Reg[15] &= 0xfffffffc; | ||||||
| 
 | 
 | ||||||
|         phys_addr = cpu->Reg[15]; |  | ||||||
| 
 |  | ||||||
|         // Find the cached instruction cream, otherwise translate it...
 |         // Find the cached instruction cream, otherwise translate it...
 | ||||||
|         auto itr = cpu->instruction_cache.find(cpu->Reg[15]); |         auto itr = cpu->instruction_cache.find(cpu->Reg[15]); | ||||||
|         if (itr != cpu->instruction_cache.end()) { |         if (itr != cpu->instruction_cache.end()) { | ||||||
|  |  | ||||||
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