diff --git a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
index 0c20c2bc3..bb0cbb4dc 100644
--- a/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
+++ b/src/core/arm/dyncom/arm_dyncom_interpreter.cpp
@@ -3886,7 +3886,6 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
 #endif
     arm_inst* inst_base;
     unsigned int addr;
-    unsigned int phys_addr;
     unsigned int num_instrs = 0;
 
     int ptr;
@@ -3905,8 +3904,6 @@ unsigned InterpreterMainLoop(ARMul_State* cpu) {
         else
             cpu->Reg[15] &= 0xfffffffc;
 
-        phys_addr = cpu->Reg[15];
-
         // Find the cached instruction cream, otherwise translate it...
         auto itr = cpu->instruction_cache.find(cpu->Reg[15]);
         if (itr != cpu->instruction_cache.end()) {