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Pass system into arm interpreter; fix tests

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This commit is contained in:
Weiyi Wang 2018-11-21 17:14:42 -05:00
parent c6b3186475
commit e87dc17da2
12 changed files with 48 additions and 38 deletions
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4
src/core/arm/dynarmic/arm_dynarmic.cpp
View file

@ -137,7 +137,7 @@ public:
parent.jit->HaltExecution();
parent.SetPC(pc);
Kernel::Thread* thread =
Core::System::GetInstance().Kernel().GetThreadManager().GetCurrentThread();
parent.system.Kernel().GetThreadManager().GetCurrentThread();
parent.SaveContext(thread->context);
GDBStub::Break();
GDBStub::SendTrap(thread, 5);
@ -165,7 +165,7 @@ public:
ARM_Dynarmic::ARM_Dynarmic(Core::System& system, PrivilegeMode initial_mode)
: system(system), cb(std::make_unique<DynarmicUserCallbacks>(*this)) {
interpreter_state = std::make_shared<ARMul_State>(initial_mode);
interpreter_state = std::make_shared<ARMul_State>(system, initial_mode);
PageTableChanged();
}

8
src/core/arm/dyncom/arm_dyncom.cpp
View file

@ -68,14 +68,14 @@ private:
u32 fpexc;
};
ARM_DynCom::ARM_DynCom(PrivilegeMode initial_mode) {
state = std::make_unique<ARMul_State>(initial_mode);
ARM_DynCom::ARM_DynCom(Core::System& system, PrivilegeMode initial_mode) : system(system) {
state = std::make_unique<ARMul_State>(system, initial_mode);
}
ARM_DynCom::~ARM_DynCom() {}
void ARM_DynCom::Run() {
ExecuteInstructions(std::max<s64>(Core::System::GetInstance().CoreTiming().GetDowncount(), 0));
ExecuteInstructions(std::max<s64>(system.CoreTiming().GetDowncount(), 0));
}
void ARM_DynCom::Step() {
@ -146,7 +146,7 @@ void ARM_DynCom::SetCP15Register(CP15Register reg, u32 value) {
void ARM_DynCom::ExecuteInstructions(u64 num_instructions) {
state->NumInstrsToExecute = num_instructions;
unsigned ticks_executed = InterpreterMainLoop(state.get());
Core::System::GetInstance().CoreTiming().AddTicks(ticks_executed);
system.CoreTiming().AddTicks(ticks_executed);
state->ServeBreak();
}

7
src/core/arm/dyncom/arm_dyncom.h
View file

@ -10,9 +10,13 @@
#include "core/arm/skyeye_common/arm_regformat.h"
#include "core/arm/skyeye_common/armstate.h"
namespace Core {
struct System;
}
class ARM_DynCom final : public ARM_Interface {
public:
explicit ARM_DynCom(PrivilegeMode initial_mode);
explicit ARM_DynCom(Core::System& system, PrivilegeMode initial_mode);
~ARM_DynCom();
void Run() override;
@ -44,5 +48,6 @@ public:
private:
void ExecuteInstructions(u64 num_instructions);
Core::System& system;
std::unique_ptr<ARMul_State> state;
};

6
src/core/arm/dyncom/arm_dyncom_interpreter.cpp
View file

@ -811,7 +811,7 @@ MICROPROFILE_DEFINE(DynCom_Decode, "DynCom", "Decode", MP_RGB(255, 64, 64));
static unsigned int InterpreterTranslateInstruction(const ARMul_State* cpu, const u32 phys_addr,
ARM_INST_PTR& inst_base) {
u32 inst_size = 4;
u32 inst = Core::System::GetInstance().Memory().Read32(phys_addr & 0xFFFFFFFC);
u32 inst = cpu->system.Memory().Read32(phys_addr & 0xFFFFFFFC);
// If we are in Thumb mode, we'll translate one Thumb instruction to the corresponding ARM
// instruction
@ -3860,11 +3860,11 @@ SUB_INST : {
SWI_INST : {
if (inst_base->cond == ConditionCode::AL || CondPassed(cpu, inst_base->cond)) {
swi_inst* const inst_cream = (swi_inst*)inst_base->component;
Core::System::GetInstance().CoreTiming().AddTicks(num_instrs);
cpu->system.CoreTiming().AddTicks(num_instrs);
cpu->NumInstrsToExecute =
num_instrs >= cpu->NumInstrsToExecute ? 0 : cpu->NumInstrsToExecute - num_instrs;
num_instrs = 0;
Kernel::SVCContext{Core::System::GetInstance()}.CallSVC(inst_cream->num & 0xFFFF);
Kernel::SVCContext{cpu->system}.CallSVC(inst_cream->num & 0xFFFF);
// The kernel would call ERET to get here, which clears exclusive memory state.
cpu->UnsetExclusiveMemoryAddress();
}

23
src/core/arm/skyeye_common/armstate.cpp
View file

@ -10,7 +10,7 @@
#include "core/core.h"
#include "core/memory.h"
ARMul_State::ARMul_State(PrivilegeMode initial_mode) {
ARMul_State::ARMul_State(Core::System& system, PrivilegeMode initial_mode) : system(system) {
Reset();
ChangePrivilegeMode(initial_mode);
}
@ -191,13 +191,13 @@ static void CheckMemoryBreakpoint(u32 address, GDBStub::BreakpointType type) {
u8 ARMul_State::ReadMemory8(u32 address) const {
CheckMemoryBreakpoint(address, GDBStub::BreakpointType::Read);
return Core::System::GetInstance().Memory().Read8(address);
return system.Memory().Read8(address);
}
u16 ARMul_State::ReadMemory16(u32 address) const {
CheckMemoryBreakpoint(address, GDBStub::BreakpointType::Read);
u16 data = Core::System::GetInstance().Memory().Read16(address);
u16 data = system.Memory().Read16(address);
if (InBigEndianMode())
data = Common::swap16(data);
@ -208,7 +208,7 @@ u16 ARMul_State::ReadMemory16(u32 address) const {
u32 ARMul_State::ReadMemory32(u32 address) const {
CheckMemoryBreakpoint(address, GDBStub::BreakpointType::Read);
u32 data = Core::System::GetInstance().Memory().Read32(address);
u32 data = system.Memory().Read32(address);
if (InBigEndianMode())
data = Common::swap32(data);
@ -219,7 +219,7 @@ u32 ARMul_State::ReadMemory32(u32 address) const {
u64 ARMul_State::ReadMemory64(u32 address) const {
CheckMemoryBreakpoint(address, GDBStub::BreakpointType::Read);
u64 data = Core::System::GetInstance().Memory().Read64(address);
u64 data = system.Memory().Read64(address);
if (InBigEndianMode())
data = Common::swap64(data);
@ -230,7 +230,7 @@ u64 ARMul_State::ReadMemory64(u32 address) const {
void ARMul_State::WriteMemory8(u32 address, u8 data) {
CheckMemoryBreakpoint(address, GDBStub::BreakpointType::Write);
Core::System::GetInstance().Memory().Write8(address, data);
system.Memory().Write8(address, data);
}
void ARMul_State::WriteMemory16(u32 address, u16 data) {
@ -239,7 +239,7 @@ void ARMul_State::WriteMemory16(u32 address, u16 data) {
if (InBigEndianMode())
data = Common::swap16(data);
Core::System::GetInstance().Memory().Write16(address, data);
system.Memory().Write16(address, data);
}
void ARMul_State::WriteMemory32(u32 address, u32 data) {
@ -248,7 +248,7 @@ void ARMul_State::WriteMemory32(u32 address, u32 data) {
if (InBigEndianMode())
data = Common::swap32(data);
Core::System::GetInstance().Memory().Write32(address, data);
system.Memory().Write32(address, data);
}
void ARMul_State::WriteMemory64(u32 address, u64 data) {
@ -257,7 +257,7 @@ void ARMul_State::WriteMemory64(u32 address, u64 data) {
if (InBigEndianMode())
data = Common::swap64(data);
Core::System::GetInstance().Memory().Write64(address, data);
system.Memory().Write64(address, data);
}
// Reads from the CP15 registers. Used with implementation of the MRC instruction.
@ -603,9 +603,8 @@ void ARMul_State::ServeBreak() {
if (last_bkpt_hit) {
Reg[15] = last_bkpt.address;
}
Kernel::Thread* thread =
Core::System::GetInstance().Kernel().GetThreadManager().GetCurrentThread();
Core::CPU().SaveContext(thread->context);
Kernel::Thread* thread = system.Kernel().GetThreadManager().GetCurrentThread();
system.CPU().SaveContext(thread->context);
if (last_bkpt_hit || GDBStub::GetCpuStepFlag()) {
last_bkpt_hit = false;
GDBStub::Break();

8
src/core/arm/skyeye_common/armstate.h
View file

@ -23,6 +23,10 @@
#include "core/arm/skyeye_common/arm_regformat.h"
#include "core/gdbstub/gdbstub.h"
namespace Core {
class System;
}
// Signal levels
enum { LOW = 0, HIGH = 1, LOWHIGH = 1, HIGHLOW = 2 };
@ -139,7 +143,7 @@ enum {
struct ARMul_State final {
public:
explicit ARMul_State(PrivilegeMode initial_mode);
explicit ARMul_State(Core::System& system, PrivilegeMode initial_mode);
void ChangePrivilegeMode(u32 new_mode);
void Reset();
@ -197,6 +201,8 @@ public:
void ServeBreak();
Core::System& system;
std::array<u32, 16> Reg{}; // The current register file
std::array<u32, 2> Reg_usr{};
std::array<u32, 2> Reg_svc{}; // R13_SVC R14_SVC