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video_core: Implement an arm64 shader-jit backend (#7002)
* externals: Add oaksim submodule Used for emitting ARM64 assembly * common: Implement aarch64 ABI Utilize oaknut to implement a stack frame. * tests: Allow shader-jit tests for x64 and a64 Run the shader-jit tests for both x86_64 and arm64 targets * video_core: Initialize arm64 shader-jit backend Passes all current unit tests! * shader_jit_a64: protect/unprotect memory when jit-ing Required on MacOS. Memory needs to be fully unprotected and then re-protected when writing or there will be memory access errors on MacOS. * shader_jit_a64: Fix ARM64-Imm overflow These conditionals were throwing exceptions since the immediate values were overflowing the available space in the `EOR` instructions. Instead they are generated from `MOV` and then `EOR`-ed after. * shader_jit_a64: Fix Geometry shader conditional * shader_jit_a64: Replace `ADRL` with `MOVP2R` Fixes some immediate-generation exceptions. * common/aarch64: Fix CallFarFunction * shader_jit_a64: Optimize `SantitizedMul` Co-authored-by: merryhime <merryhime@users.noreply.github.com> * shader_jit_a64: Fix address register offset behavior Based on https://github.com/citra-emu/citra/pull/6942 Passes unit tests. * shader_jit_a64: Fix `RET` address offset A64 stack is 16-byte aligned rather than 8. So a direct port of the x64 code won't work. Fixes weird branches into invalid memory for any shaders with subroutines. * shader_jit_a64: Increase max program size Tuned for A64 program size. * shader_jit_a64: Use `UBFX` for extracting loop-state Co-authored-by: JosJuice <JosJuice@users.noreply.github.com> * shader_jit_a64: Optimize `SUB+CMP` to `SUBS` Co-authored-by: JosJuice <JosJuice@users.noreply.github.com> * shader_jit_a64: Optimize `CMP+B` to `CBNZ` Co-authored-by: JosJuice <JosJuice@users.noreply.github.com> * shader_jit_a64: Use `FMOV` for `ONE` vector Co-authored-by: JosJuice <JosJuice@users.noreply.github.com> * shader_jit_a64: Remove x86-specific documentation * shader_jit_a64: Use `UBFX` to extract exponent Co-authored-by: JosJuice <JosJuice@users.noreply.github.com> * shader_jit_a64: Remove redundant MIN/MAX `SRC2`-NaN check Special handling only needs to check SRC1 for NaN, not SRC2. It would work as follows in the four possible cases: No NaN: No special handling needed. Only SRC1 is NaN: The special handling is triggered because SRC1 is NaN, and SRC2 is picked. Only SRC2 is NaN: FMAX automatically picks SRC2 because it always picks the NaN if there is one. Both SRC1 and SRC2 are NaN: The special handling is triggered because SRC1 is NaN, and SRC2 is picked. Co-authored-by: JosJuice <JosJuice@users.noreply.github.com> * shader_jit/tests:: Add catch-stringifier for vec2f/vec3f * shader_jit/tests: Add Dest Mask unit test * shader_jit_a64: Fix Dest-Mask `BSL` operand order Passes the dest-mask unit tests now. * shader_jit_a64: Use `MOVI` for DestEnable mask Accelerate certain cases of masking with MOVI as well Co-authored-by: JosJuice <JosJuice@users.noreply.github.com> * shader_jit/tests: Add source-swizzle unit test This is not expansive. Generating all `4^4` cases seems to make Catch2 crash. So I've added some component-masking(non-reordering) tests based on the Dest-Mask unit-test and some additional ones to test broadcasts/splats and component re-ordering. * shader_jit_a64: Fix swizzle index generation This was still generating `SHUFPS` indices and not the ones that we wanted for the `TBL` instruction. Passes all unit tests now. * shader_jit/tests: Add `ShaderSetup` constructor to `ShaderTest` Rather than using the direct output of `CompileShaderSetup` allow a `ShaderSetup` object to be passed in directly. This enabled the ability emit assembly that is not directly supported by nihstro. * shader_jit/tests: Add `CALL` unit-test Tests nested `CALL` instructions to eventually reach an `EX2` instruction. EX2 is picked in particular since it is implemented as an even deeper dispatch and ensures subroutines are properly implemented between `CALL` instructions and implementation-calls. * shader_jit_a64: Fix nested `BL` subroutines `lr` was getting writen over by nested calls to `BL`, causing undefined behavior with mixtures of `CALL`, `EX2`, and `LG2` instructions. Each usage of `BL` is now protected with a stach push/pop to preserve and restore teh `lr` register to allow nested subroutines to work properly. * shader_jit/tests: Allocate generated tests on heap Each of these generated shader-test objects were causing the stack to overflow. Allocate each of the generated tests on the heap and use unique_ptr so they only exist within the life-time of the `REQUIRE` statement. * shader_jit_a64: Preserve `lr` register from external function calls `EMIT` makes an external function call, and should be preserving `lr` * shader_jit/tests: Add `MAD` unit-test The Inline Asm version requires an upstream fix: https://github.com/neobrain/nihstro/issues/68 Instead, the program code is manually configured and added. * shader_jit/tests: Fix uninitialized instructions These `union`-type instruction-types were uninitialized, causing tests to indeterminantly fail at times. * shader_jit_a64: Remove unneeded `MOV` Residue from the direct-port of x64 code. * shader_jit_a64: Use `std::array` for `instr_table` Add some type-safety and const-correctness around this type as well. * shader_jit_a64: Avoid c-style offset casting Add some more const-correctness to this function as well. * video_core: Add arch preprocessor comments * common/aarch64: Use X16 as the veneer register https://developer.arm.com/documentation/102374/0101/Procedure-Call-Standard * shader_jit/tests: Add uniform reading unit-test Particularly to ensure that addresses are being properly truncated * common/aarch64: Use `X0` as `ABI_RETURN` `X8` is used as the indirect return result value in the case that the result is bigger than 128-bits. Principally `X0` is the general-case return register though. * common/aarch64: Add veneer register note `LR` is generally overwritten by `BLR` anyways, and would also be a safe veneer to utilize for far-calls. * shader_jit_a64: Remove unneeded scratch register from `SanitizedMul` * shader_jit_a64: Fix CALLU condition Should be `EQ` not `NE`. Fixes the regression on Kid Icarus. No known regressions anymore! --------- Co-authored-by: merryhime <merryhime@users.noreply.github.com> Co-authored-by: JosJuice <JosJuice@users.noreply.github.com>
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commit
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14 changed files with 1874 additions and 25 deletions
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@ -15,7 +15,7 @@ add_executable(tests
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audio_core/lle/lle.cpp
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audio_core/audio_fixures.h
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audio_core/decoder_tests.cpp
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video_core/shader/shader_jit_x64_compiler.cpp
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video_core/shader/shader_jit_compiler.cpp
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)
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create_target_directory_groups(tests)
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@ -1,9 +1,9 @@
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// Copyright 2017 Citra Emulator Project
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// Copyright 2023 Citra Emulator Project
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// Licensed under GPLv2 or any later version
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// Refer to the license.txt file included.
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#include "common/arch.h"
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#if CITRA_ARCH(x86_64)
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#if CITRA_ARCH(x86_64) || CITRA_ARCH(arm64)
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#include <algorithm>
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#include <cmath>
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@ -14,7 +14,11 @@
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#include <fmt/format.h>
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#include <nihstro/inline_assembly.h>
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#include "video_core/shader/shader_interpreter.h"
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#if CITRA_ARCH(x86_64)
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#include "video_core/shader/shader_jit_x64_compiler.h"
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#elif CITRA_ARCH(arm64)
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#include "video_core/shader/shader_jit_a64_compiler.h"
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#endif
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using JitShader = Pica::Shader::JitShader;
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using ShaderInterpreter = Pica::Shader::InterpreterEngine;
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@ -31,6 +35,18 @@ static constexpr Common::Vec4f vec4_zero = Common::Vec4f::AssignToAll(0.0f);
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namespace Catch {
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template <>
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struct StringMaker<Common::Vec2f> {
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static std::string convert(Common::Vec2f value) {
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return fmt::format("({}, {})", value.x, value.y);
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}
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};
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template <>
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struct StringMaker<Common::Vec3f> {
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static std::string convert(Common::Vec3f value) {
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return fmt::format("({}, {}, {})", value.r(), value.g(), value.b());
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}
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};
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template <>
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struct StringMaker<Common::Vec4f> {
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static std::string convert(Common::Vec4f value) {
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return fmt::format("({}, {}, {}, {})", value.r(), value.g(), value.b(), value.a());
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@ -59,6 +75,11 @@ public:
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shader_jit.Compile(&shader_setup->program_code, &shader_setup->swizzle_data);
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}
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explicit ShaderTest(std::unique_ptr<Pica::Shader::ShaderSetup> input_shader_setup)
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: shader_setup(std::move(input_shader_setup)) {
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shader_jit.Compile(&shader_setup->program_code, &shader_setup->swizzle_data);
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}
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Common::Vec4f Run(std::span<const Common::Vec4f> inputs) {
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Pica::Shader::UnitState shader_unit;
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RunJit(shader_unit, inputs);
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@ -144,6 +165,41 @@ TEST_CASE("ADD", "[video_core][shader][shader_jit]") {
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REQUIRE(std::isinf(shader.Run({INFINITY, -1.0f}).x));
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}
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TEST_CASE("CALL", "[video_core][shader][shader_jit]") {
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const auto sh_input = SourceRegister::MakeInput(0);
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const auto sh_output = DestRegister::MakeOutput(0);
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auto shader_setup = CompileShaderSetup({
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{OpCode::Id::NOP}, // call foo
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{OpCode::Id::END},
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// .proc foo
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{OpCode::Id::NOP}, // call ex2
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{OpCode::Id::END},
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// .proc ex2
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{OpCode::Id::EX2, sh_output, sh_input},
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{OpCode::Id::END},
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});
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// nihstro does not support the CALL* instructions, so the instruction-binary must be manually
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// inserted here:
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nihstro::Instruction CALL = {};
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CALL.opcode = nihstro::OpCode(nihstro::OpCode::Id::CALL);
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// call foo
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CALL.flow_control.dest_offset = 2;
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CALL.flow_control.num_instructions = 1;
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shader_setup->program_code[0] = CALL.hex;
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// call ex2
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CALL.flow_control.dest_offset = 4;
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CALL.flow_control.num_instructions = 1;
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shader_setup->program_code[2] = CALL.hex;
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auto shader = ShaderTest(std::move(shader_setup));
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REQUIRE(shader.Run(0.f).x == Catch::Approx(1.f));
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}
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TEST_CASE("DP3", "[video_core][shader][shader_jit]") {
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const auto sh_input1 = SourceRegister::MakeInput(0);
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const auto sh_input2 = SourceRegister::MakeInput(1);
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@ -395,6 +451,39 @@ TEST_CASE("RSQ", "[video_core][shader][shader_jit]") {
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REQUIRE(shader.Run({0.0625f}).x == Catch::Approx(4.0f).margin(0.004f));
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}
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TEST_CASE("Uniform Read", "[video_core][shader][shader_jit]") {
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const auto sh_input = SourceRegister::MakeInput(0);
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const auto sh_c0 = SourceRegister::MakeFloat(0);
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const auto sh_output = DestRegister::MakeOutput(0);
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auto shader = ShaderTest({
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// mova a0.x, sh_input.x
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{OpCode::Id::MOVA, DestRegister{}, "x", sh_input, "x", SourceRegister{}, "",
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nihstro::InlineAsm::RelativeAddress::A1},
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// mov sh_output.xyzw, c0[a0.x].xyzw
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{OpCode::Id::MOV, sh_output, "xyzw", sh_c0, "xyzw", SourceRegister{}, "",
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nihstro::InlineAsm::RelativeAddress::A1},
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{OpCode::Id::END},
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});
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// Prepare shader uniforms
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std::array<Common::Vec4f, 96> f_uniforms = {};
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for (u32 i = 0; i < 96; ++i) {
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const float color = (i * 2.0f) / 255.0f;
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const auto color_f24 = Pica::f24::FromFloat32(color);
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shader.shader_setup->uniforms.f[i] = {color_f24, color_f24, color_f24, Pica::f24::One()};
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f_uniforms[i] = {color, color, color, 1.0f};
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}
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for (u32 i = 0; i < 96; ++i) {
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const float index = static_cast<float>(i);
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// Add some fractional values to test proper float->integer truncation
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const float fractional = (i % 17) / 17.0f;
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REQUIRE(shader.Run(index + fractional) == f_uniforms[i]);
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}
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}
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TEST_CASE("Address Register Offset", "[video_core][shader][shader_jit]") {
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const auto sh_input = SourceRegister::MakeInput(0);
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const auto sh_c40 = SourceRegister::MakeFloat(40);
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@ -445,23 +534,83 @@ TEST_CASE("Address Register Offset", "[video_core][shader][shader_jit]") {
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REQUIRE(shader.Run(-129.f) == f_uniforms[40]);
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}
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// TODO: Requires fix from https://github.com/neobrain/nihstro/issues/68
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// TEST_CASE("MAD", "[video_core][shader][shader_jit]") {
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// const auto sh_input1 = SourceRegister::MakeInput(0);
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// const auto sh_input2 = SourceRegister::MakeInput(1);
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// const auto sh_input3 = SourceRegister::MakeInput(2);
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// const auto sh_output = DestRegister::MakeOutput(0);
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TEST_CASE("Dest Mask", "[video_core][shader][shader_jit]") {
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const auto sh_input = SourceRegister::MakeInput(0);
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const auto sh_output = DestRegister::MakeOutput(0);
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// auto shader = ShaderTest({
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// {OpCode::Id::MAD, sh_output, sh_input1, sh_input2, sh_input3},
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// {OpCode::Id::END},
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// });
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const auto shader = [&sh_input, &sh_output](const char* dest_mask) {
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return std::unique_ptr<ShaderTest>(new ShaderTest{
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{OpCode::Id::MOV, sh_output, dest_mask, sh_input, "xyzw", SourceRegister{}, ""},
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{OpCode::Id::END},
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});
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};
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// REQUIRE(shader.Run({vec4_inf, vec4_zero, vec4_zero}).x == 0.0f);
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// REQUIRE(std::isnan(shader.Run({vec4_nan, vec4_zero, vec4_zero}).x));
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const Common::Vec4f iota_vec = {1.0f, 2.0f, 3.0f, 4.0f};
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// REQUIRE(shader.Run({vec4_one, vec4_one, vec4_one}).x == 2.0f);
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// }
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REQUIRE(shader("x")->Run({iota_vec}).x == iota_vec.x);
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REQUIRE(shader("y")->Run({iota_vec}).y == iota_vec.y);
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REQUIRE(shader("z")->Run({iota_vec}).z == iota_vec.z);
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REQUIRE(shader("w")->Run({iota_vec}).w == iota_vec.w);
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REQUIRE(shader("xy")->Run({iota_vec}).xy() == iota_vec.xy());
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REQUIRE(shader("xz")->Run({iota_vec}).xz() == iota_vec.xz());
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REQUIRE(shader("xw")->Run({iota_vec}).xw() == iota_vec.xw());
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REQUIRE(shader("yz")->Run({iota_vec}).yz() == iota_vec.yz());
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REQUIRE(shader("yw")->Run({iota_vec}).yw() == iota_vec.yw());
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REQUIRE(shader("zw")->Run({iota_vec}).zw() == iota_vec.zw());
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REQUIRE(shader("xyz")->Run({iota_vec}).xyz() == iota_vec.xyz());
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REQUIRE(shader("xyw")->Run({iota_vec}).xyw() == iota_vec.xyw());
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REQUIRE(shader("xzw")->Run({iota_vec}).xzw() == iota_vec.xzw());
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REQUIRE(shader("yzw")->Run({iota_vec}).yzw() == iota_vec.yzw());
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REQUIRE(shader("xyzw")->Run({iota_vec}) == iota_vec);
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}
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TEST_CASE("MAD", "[video_core][shader][shader_jit]") {
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const auto sh_input1 = SourceRegister::MakeInput(0);
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const auto sh_input2 = SourceRegister::MakeInput(1);
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const auto sh_input3 = SourceRegister::MakeInput(2);
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const auto sh_output = DestRegister::MakeOutput(0);
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auto shader_setup = CompileShaderSetup({
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// TODO: Requires fix from https://github.com/neobrain/nihstro/issues/68
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// {OpCode::Id::MAD, sh_output, sh_input1, sh_input2, sh_input3},
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{OpCode::Id::NOP},
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{OpCode::Id::END},
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});
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// nihstro does not support the MAD* instructions, so the instruction-binary must be manually
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// inserted here:
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nihstro::Instruction MAD = {};
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MAD.opcode = nihstro::OpCode::Id::MAD;
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MAD.mad.operand_desc_id = 0;
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MAD.mad.src1 = sh_input1;
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MAD.mad.src2 = sh_input2;
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MAD.mad.src3 = sh_input3;
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MAD.mad.dest = sh_output;
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shader_setup->program_code[0] = MAD.hex;
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nihstro::SwizzlePattern swizzle = {};
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swizzle.dest_mask = 0b1111;
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swizzle.SetSelectorSrc1(0, SwizzlePattern::Selector::x);
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swizzle.SetSelectorSrc1(1, SwizzlePattern::Selector::y);
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swizzle.SetSelectorSrc1(2, SwizzlePattern::Selector::z);
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swizzle.SetSelectorSrc1(3, SwizzlePattern::Selector::w);
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swizzle.SetSelectorSrc2(0, SwizzlePattern::Selector::x);
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swizzle.SetSelectorSrc2(1, SwizzlePattern::Selector::y);
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swizzle.SetSelectorSrc2(2, SwizzlePattern::Selector::z);
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swizzle.SetSelectorSrc2(3, SwizzlePattern::Selector::w);
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swizzle.SetSelectorSrc3(0, SwizzlePattern::Selector::x);
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swizzle.SetSelectorSrc3(1, SwizzlePattern::Selector::y);
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swizzle.SetSelectorSrc3(2, SwizzlePattern::Selector::z);
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swizzle.SetSelectorSrc3(3, SwizzlePattern::Selector::w);
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shader_setup->swizzle_data[0] = swizzle.hex;
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auto shader = ShaderTest(std::move(shader_setup));
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REQUIRE(shader.Run({vec4_zero, vec4_zero, vec4_zero}) == vec4_zero);
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REQUIRE(shader.Run({vec4_one, vec4_one, vec4_one}) == (vec4_one * 2.0f));
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REQUIRE(shader.Run({vec4_inf, vec4_zero, vec4_zero}) == vec4_zero);
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REQUIRE(shader.Run({vec4_nan, vec4_zero, vec4_zero}) == vec4_nan);
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}
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TEST_CASE("Nested Loop", "[video_core][shader][shader_jit]") {
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const auto sh_input = SourceRegister::MakeInput(0);
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}
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}
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#endif // CITRA_ARCH(x86_64)
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TEST_CASE("Source Swizzle", "[video_core][shader][shader_jit]") {
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const auto sh_input = SourceRegister::MakeInput(0);
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const auto sh_output = DestRegister::MakeOutput(0);
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const auto shader = [&sh_input, &sh_output](const char* swizzle) {
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return std::unique_ptr<ShaderTest>(new ShaderTest{
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{OpCode::Id::MOV, sh_output, "xyzw", sh_input, swizzle, SourceRegister{}, ""},
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{OpCode::Id::END},
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});
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};
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const Common::Vec4f iota_vec = {1.0f, 2.0f, 3.0f, 4.0f};
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REQUIRE(shader("x")->Run({iota_vec}).x == iota_vec.x);
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REQUIRE(shader("y")->Run({iota_vec}).x == iota_vec.y);
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REQUIRE(shader("z")->Run({iota_vec}).x == iota_vec.z);
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REQUIRE(shader("w")->Run({iota_vec}).x == iota_vec.w);
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REQUIRE(shader("xy")->Run({iota_vec}).xy() == iota_vec.xy());
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REQUIRE(shader("xz")->Run({iota_vec}).xy() == iota_vec.xz());
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REQUIRE(shader("xw")->Run({iota_vec}).xy() == iota_vec.xw());
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REQUIRE(shader("yz")->Run({iota_vec}).xy() == iota_vec.yz());
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REQUIRE(shader("yw")->Run({iota_vec}).xy() == iota_vec.yw());
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REQUIRE(shader("zw")->Run({iota_vec}).xy() == iota_vec.zw());
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REQUIRE(shader("yy")->Run({iota_vec}).xy() == iota_vec.yy());
|
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REQUIRE(shader("wx")->Run({iota_vec}).xy() == iota_vec.wx());
|
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REQUIRE(shader("xyz")->Run({iota_vec}).xyz() == iota_vec.xyz());
|
||||
REQUIRE(shader("xyw")->Run({iota_vec}).xyz() == iota_vec.xyw());
|
||||
REQUIRE(shader("xzw")->Run({iota_vec}).xyz() == iota_vec.xzw());
|
||||
REQUIRE(shader("yzw")->Run({iota_vec}).xyz() == iota_vec.yzw());
|
||||
REQUIRE(shader("yyy")->Run({iota_vec}).xyz() == iota_vec.yyy());
|
||||
REQUIRE(shader("yxw")->Run({iota_vec}).xyz() == iota_vec.yxw());
|
||||
REQUIRE(shader("xyzw")->Run({iota_vec}) == iota_vec);
|
||||
REQUIRE(shader("wzxy")->Run({iota_vec}) ==
|
||||
Common::Vec4f(iota_vec.w, iota_vec.z, iota_vec.x, iota_vec.y));
|
||||
REQUIRE(shader("yyyy")->Run({iota_vec}) ==
|
||||
Common::Vec4f(iota_vec.y, iota_vec.y, iota_vec.y, iota_vec.y));
|
||||
}
|
||||
|
||||
#endif // CITRA_ARCH(x86_64) || CITRA_ARCH(arm64)
|
||||
Loading…
Add table
Add a link
Reference in a new issue