shader_jit_x64: Fix conditional evaluation extended-bit hazard

The unit test seems to have identified a bug in the x64 jit too. The x64
jit was doing 32-bit comparisons despite the condition flags being 8-bit
values and is sensitive to garbage being in the upper 24 bits of the
register. This is fixed by using the proper 8-bit register types rather
than the 32-bit ones(`eax,`ebx` -> `al`, `bl`).
This commit is contained in:
Wunkolo 2024-08-17 12:42:38 -07:00
parent e99f7da24e
commit a510de0e4c
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@ -401,29 +401,29 @@ void JitShader::Compile_EvaluateCondition(Instruction instr) {
// Note: NXOR is used below to check for equality
switch (instr.flow_control.op) {
case Instruction::FlowControlType::Or:
mov(eax, COND0);
mov(ebx, COND1);
xor_(eax, (instr.flow_control.refx.Value() ^ 1));
xor_(ebx, (instr.flow_control.refy.Value() ^ 1));
or_(eax, ebx);
mov(al, COND0.cvt8());
mov(bl, COND1.cvt8());
xor_(al, (instr.flow_control.refx.Value() ^ 1));
xor_(bl, (instr.flow_control.refy.Value() ^ 1));
or_(al, bl);
break;
case Instruction::FlowControlType::And:
mov(eax, COND0);
mov(ebx, COND1);
xor_(eax, (instr.flow_control.refx.Value() ^ 1));
xor_(ebx, (instr.flow_control.refy.Value() ^ 1));
and_(eax, ebx);
mov(al, COND0);
mov(bl, COND1);
xor_(al, (instr.flow_control.refx.Value() ^ 1));
xor_(bl, (instr.flow_control.refy.Value() ^ 1));
and_(al, bl);
break;
case Instruction::FlowControlType::JustX:
mov(eax, COND0);
xor_(eax, (instr.flow_control.refx.Value() ^ 1));
mov(al, COND0);
xor_(al, (instr.flow_control.refx.Value() ^ 1));
break;
case Instruction::FlowControlType::JustY:
mov(eax, COND1);
xor_(eax, (instr.flow_control.refy.Value() ^ 1));
mov(al, COND1);
xor_(al, (instr.flow_control.refy.Value() ^ 1));
break;
}
}