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shader_jit_x64: Fix conditional evaluation extended-bit hazard
The unit test seems to have identified a bug in the x64 jit too. The x64 jit was doing 32-bit comparisons despite the condition flags being 8-bit values and is sensitive to garbage being in the upper 24 bits of the register. This is fixed by using the proper 8-bit register types rather than the 32-bit ones(`eax,`ebx` -> `al`, `bl`).
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1 changed files with 14 additions and 14 deletions
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@ -401,29 +401,29 @@ void JitShader::Compile_EvaluateCondition(Instruction instr) {
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// Note: NXOR is used below to check for equality
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switch (instr.flow_control.op) {
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case Instruction::FlowControlType::Or:
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mov(eax, COND0);
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mov(ebx, COND1);
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xor_(eax, (instr.flow_control.refx.Value() ^ 1));
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xor_(ebx, (instr.flow_control.refy.Value() ^ 1));
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or_(eax, ebx);
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mov(al, COND0.cvt8());
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mov(bl, COND1.cvt8());
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xor_(al, (instr.flow_control.refx.Value() ^ 1));
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xor_(bl, (instr.flow_control.refy.Value() ^ 1));
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or_(al, bl);
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break;
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case Instruction::FlowControlType::And:
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mov(eax, COND0);
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mov(ebx, COND1);
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xor_(eax, (instr.flow_control.refx.Value() ^ 1));
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xor_(ebx, (instr.flow_control.refy.Value() ^ 1));
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and_(eax, ebx);
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mov(al, COND0);
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mov(bl, COND1);
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xor_(al, (instr.flow_control.refx.Value() ^ 1));
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xor_(bl, (instr.flow_control.refy.Value() ^ 1));
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and_(al, bl);
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break;
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case Instruction::FlowControlType::JustX:
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mov(eax, COND0);
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xor_(eax, (instr.flow_control.refx.Value() ^ 1));
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mov(al, COND0);
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xor_(al, (instr.flow_control.refx.Value() ^ 1));
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break;
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case Instruction::FlowControlType::JustY:
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mov(eax, COND1);
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xor_(eax, (instr.flow_control.refy.Value() ^ 1));
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mov(al, COND1);
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xor_(al, (instr.flow_control.refy.Value() ^ 1));
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break;
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}
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}
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