mirror of
https://github.com/PabloMK7/citra.git
synced 2025-11-03 23:28:48 +00:00
dyncom: Make Load/Store instructions support big endian
This commit is contained in:
Lioncash
parent
f280806214
commit
9fdb311d6e
7 changed files with 204 additions and 81 deletions
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@ -4362,30 +4362,30 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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if (BIT(inst, 22) && !BIT(inst, 15)) {
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for (int i = 0; i < 13; i++) {
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if(BIT(inst, i)) {
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cpu->Reg[i] = Memory::Read32(addr);
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cpu->Reg[i] = ReadMemory32(cpu, addr);
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addr += 4;
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}
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}
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if (BIT(inst, 13)) {
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if (cpu->Mode == USER32MODE)
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cpu->Reg[13] = Memory::Read32(addr);
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cpu->Reg[13] = ReadMemory32(cpu, addr);
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else
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cpu->Reg_usr[0] = Memory::Read32(addr);
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cpu->Reg_usr[0] = ReadMemory32(cpu, addr);
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addr += 4;
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}
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if (BIT(inst, 14)) {
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if (cpu->Mode == USER32MODE)
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cpu->Reg[14] = Memory::Read32(addr);
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cpu->Reg[14] = ReadMemory32(cpu, addr);
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else
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cpu->Reg_usr[1] = Memory::Read32(addr);
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cpu->Reg_usr[1] = ReadMemory32(cpu, addr);
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addr += 4;
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}
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} else if (!BIT(inst, 22)) {
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for(int i = 0; i < 16; i++ ){
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if(BIT(inst, i)){
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unsigned int ret = Memory::Read32(addr);
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unsigned int ret = ReadMemory32(cpu, addr);
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// For armv5t, should enter thumb when bits[0] is non-zero.
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if(i == 15){
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@ -4400,7 +4400,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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} else if (BIT(inst, 22) && BIT(inst, 15)) {
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for(int i = 0; i < 15; i++ ){
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if(BIT(inst, i)){
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cpu->Reg[i] = Memory::Read32(addr);
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cpu->Reg[i] = ReadMemory32(cpu, addr);
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addr += 4;
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}
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}
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@ -4411,7 +4411,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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LOAD_NZCVT;
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}
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cpu->Reg[15] = Memory::Read32(addr);
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cpu->Reg[15] = ReadMemory32(cpu, addr);
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}
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if (BIT(inst, 15)) {
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@ -4445,20 +4445,18 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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LDR_INST:
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{
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ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
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//if ((inst_base->cond == 0xe) || CondPassed(cpu, inst_base->cond)) {
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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unsigned int value = Memory::Read32(addr);
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cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
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unsigned int value = ReadMemory32(cpu, addr);
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cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
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if (BITS(inst_cream->inst, 12, 15) == 15) {
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// For armv5t, should enter thumb when bits[0] is non-zero.
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cpu->TFlag = value & 0x1;
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cpu->Reg[15] &= 0xFFFFFFFE;
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INC_PC(sizeof(ldst_inst));
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goto DISPATCH;
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}
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//}
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if (BITS(inst_cream->inst, 12, 15) == 15) {
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// For armv5t, should enter thumb when bits[0] is non-zero.
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cpu->TFlag = value & 0x1;
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cpu->Reg[15] &= 0xFFFFFFFE;
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INC_PC(sizeof(ldst_inst));
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goto DISPATCH;
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}
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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INC_PC(sizeof(ldst_inst));
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@ -4471,7 +4469,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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ldst_inst *inst_cream = (ldst_inst *)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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unsigned int value = Memory::Read32(addr);
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unsigned int value = ReadMemory32(cpu, addr);
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cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
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if (BITS(inst_cream->inst, 12, 15) == 15) {
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@ -4554,8 +4552,10 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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// Should check if RD is even-numbered, Rd != 14, addr[0:1] == 0, (CP15_reg1_U == 1 || addr[2] == 0)
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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cpu->Reg[BITS(inst_cream->inst, 12, 15)] = Memory::Read32(addr);
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cpu->Reg[BITS(inst_cream->inst, 12, 15) + 1] = Memory::Read32(addr + 4);
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// The 3DS doesn't have LPAE (Large Physical Access Extension), so it
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// wouldn't do this as a single read.
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cpu->Reg[BITS(inst_cream->inst, 12, 15) + 0] = ReadMemory32(cpu, addr);
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cpu->Reg[BITS(inst_cream->inst, 12, 15) + 1] = ReadMemory32(cpu, addr + 4);
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// No dispatch since this operation should not modify R15
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}
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@ -4574,7 +4574,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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add_exclusive_addr(cpu, read_addr);
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cpu->exclusive_state = 1;
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RD = Memory::Read32(read_addr);
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RD = ReadMemory32(cpu, read_addr);
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if (inst_cream->Rd == 15) {
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INC_PC(sizeof(generic_arm_inst));
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goto DISPATCH;
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@ -4614,7 +4614,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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add_exclusive_addr(cpu, read_addr);
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cpu->exclusive_state = 1;
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RD = Memory::Read16(read_addr);
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RD = ReadMemory16(cpu, read_addr);
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if (inst_cream->Rd == 15) {
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INC_PC(sizeof(generic_arm_inst));
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goto DISPATCH;
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@ -4634,8 +4634,8 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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add_exclusive_addr(cpu, read_addr);
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cpu->exclusive_state = 1;
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RD = Memory::Read32(read_addr);
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RD2 = Memory::Read32(read_addr + 4);
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RD = ReadMemory32(cpu, read_addr);
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RD2 = ReadMemory32(cpu, read_addr + 4);
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if (inst_cream->Rd == 15) {
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INC_PC(sizeof(generic_arm_inst));
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@ -4652,7 +4652,8 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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cpu->Reg[BITS(inst_cream->inst, 12, 15)] = Memory::Read16(addr);
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cpu->Reg[BITS(inst_cream->inst, 12, 15)] = ReadMemory16(cpu, addr);
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if (BITS(inst_cream->inst, 12, 15) == 15) {
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INC_PC(sizeof(ldst_inst));
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goto DISPATCH;
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@ -4688,7 +4689,8 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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if (inst_base->cond == 0xE || CondPassed(cpu, inst_base->cond)) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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unsigned int value = Memory::Read16(addr);
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unsigned int value = ReadMemory16(cpu, addr);
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if (BIT(value, 15)) {
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value |= 0xffff0000;
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}
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@ -4709,7 +4711,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 1);
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unsigned int value = Memory::Read32(addr);
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unsigned int value = ReadMemory32(cpu, addr);
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cpu->Reg[BITS(inst_cream->inst, 12, 15)] = value;
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if (BITS(inst_cream->inst, 12, 15) == 15) {
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@ -6010,36 +6012,36 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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if (BIT(inst_cream->inst, 22) == 1) {
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for (int i = 0; i < 13; i++) {
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if (BIT(inst_cream->inst, i)) {
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Memory::Write32(addr, cpu->Reg[i]);
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WriteMemory32(cpu, addr, cpu->Reg[i]);
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addr += 4;
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}
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}
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if (BIT(inst_cream->inst, 13)) {
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if (cpu->Mode == USER32MODE)
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Memory::Write32(addr, cpu->Reg[13]);
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WriteMemory32(cpu, addr, cpu->Reg[13]);
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else
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Memory::Write32(addr, cpu->Reg_usr[0]);
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WriteMemory32(cpu, addr, cpu->Reg_usr[0]);
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addr += 4;
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}
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if (BIT(inst_cream->inst, 14)) {
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if (cpu->Mode == USER32MODE)
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Memory::Write32(addr, cpu->Reg[14]);
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WriteMemory32(cpu, addr, cpu->Reg[14]);
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else
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Memory::Write32(addr, cpu->Reg_usr[1]);
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WriteMemory32(cpu, addr, cpu->Reg_usr[1]);
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addr += 4;
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}
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if (BIT(inst_cream->inst, 15)) {
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Memory::Write32(addr, cpu->Reg_usr[1] + 8);
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WriteMemory32(cpu, addr, cpu->Reg_usr[1] + 8);
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}
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} else {
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for (int i = 0; i < 15; i++) {
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if (BIT(inst_cream->inst, i)) {
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if (i == Rn)
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Memory::Write32(addr, old_RN);
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WriteMemory32(cpu, addr, old_RN);
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else
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Memory::Write32(addr, cpu->Reg[i]);
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WriteMemory32(cpu, addr, cpu->Reg[i]);
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addr += 4;
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}
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@ -6047,7 +6049,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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// Check PC reg
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if (BIT(inst_cream->inst, 15))
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Memory::Write32(addr, cpu->Reg_usr[1] + 8);
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WriteMemory32(cpu, addr, cpu->Reg_usr[1] + 8);
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}
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}
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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@ -6080,7 +6082,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 0);
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unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)];
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Memory::Write32(addr, value);
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WriteMemory32(cpu, addr, value);
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}
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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INC_PC(sizeof(ldst_inst));
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@ -6143,10 +6145,10 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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ldst_inst* inst_cream = (ldst_inst*)inst_base->component;
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 0);
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unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)];
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Memory::Write32(addr, value);
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value = cpu->Reg[BITS(inst_cream->inst, 12, 15) + 1];
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Memory::Write32(addr + 4, value);
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// The 3DS doesn't have the Large Physical Access Extension (LPAE)
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// so STRD wouldn't store these as a single write.
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WriteMemory32(cpu, addr + 0, cpu->Reg[BITS(inst_cream->inst, 12, 15)]);
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WriteMemory32(cpu, addr + 4, cpu->Reg[BITS(inst_cream->inst, 12, 15) + 1]);
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}
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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INC_PC(sizeof(ldst_inst));
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@ -6163,7 +6165,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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remove_exclusive(cpu, write_addr);
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cpu->exclusive_state = 0;
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Memory::Write32(write_addr, cpu->Reg[inst_cream->Rm]);
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WriteMemory32(cpu, write_addr, RM);
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RD = 0;
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} else {
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// Failed to write due to mutex access
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@ -6207,8 +6209,16 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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remove_exclusive(cpu, write_addr);
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cpu->exclusive_state = 0;
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Memory::Write32(write_addr, cpu->Reg[inst_cream->Rm]);
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Memory::Write32(write_addr + 4, cpu->Reg[inst_cream->Rm + 1]);
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const u32 rt = cpu->Reg[inst_cream->Rm + 0];
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const u32 rt2 = cpu->Reg[inst_cream->Rm + 1];
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u64 value;
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if (InBigEndianMode(cpu))
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value = (((u64)rt << 32) | rt2);
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else
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value = (((u64)rt2 << 32) | rt);
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WriteMemory64(cpu, write_addr, value);
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RD = 0;
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}
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else {
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@ -6231,7 +6241,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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remove_exclusive(cpu, write_addr);
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cpu->exclusive_state = 0;
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Memory::Write16(write_addr, cpu->Reg[inst_cream->Rm]);
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WriteMemory16(cpu, write_addr, RM);
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RD = 0;
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} else {
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// Failed to write due to mutex access
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@ -6250,7 +6260,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 0);
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unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)] & 0xffff;
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Memory::Write16(addr, value);
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WriteMemory16(cpu, addr, value);
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}
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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INC_PC(sizeof(ldst_inst));
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@ -6264,7 +6274,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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inst_cream->get_addr(cpu, inst_cream->inst, addr, 0);
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unsigned int value = cpu->Reg[BITS(inst_cream->inst, 12, 15)];
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Memory::Write32(addr, value);
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WriteMemory32(cpu, addr, value);
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}
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cpu->Reg[15] += GET_INST_SIZE(cpu);
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INC_PC(sizeof(ldst_inst));
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@ -6323,8 +6333,8 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
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swp_inst* inst_cream = (swp_inst*)inst_base->component;
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addr = RN;
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unsigned int value = Memory::Read32(addr);
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Memory::Write32(addr, RM);
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unsigned int value = ReadMemory32(cpu, addr);
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WriteMemory32(cpu, addr, RM);
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RD = value;
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}
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