mirror of
				https://github.com/PabloMK7/citra.git
				synced 2025-10-31 05:40:04 +00:00 
			
		
		
		
	arm: fixed bug in how thread context switch occurs with SkyEye
This commit is contained in:
		
							parent
							
								
									870c6146e7
								
							
						
					
					
						commit
						9ece9da50d
					
				
					 2 changed files with 9 additions and 2 deletions
				
			
		|  | @ -118,6 +118,9 @@ void ARM_Interpreter::SaveContext(ThreadContext& ctx) { | ||||||
| 
 | 
 | ||||||
|     ctx.fpscr = state->VFP[1]; |     ctx.fpscr = state->VFP[1]; | ||||||
|     ctx.fpexc = state->VFP[2]; |     ctx.fpexc = state->VFP[2]; | ||||||
|  | 
 | ||||||
|  |     ctx.reg_15 = state->Reg[15]; | ||||||
|  |     ctx.mode = state->NextInstr; | ||||||
| } | } | ||||||
| 
 | 
 | ||||||
| /**
 | /**
 | ||||||
|  | @ -137,8 +140,8 @@ void ARM_Interpreter::LoadContext(const ThreadContext& ctx) { | ||||||
|     state->VFP[1] = ctx.fpscr; |     state->VFP[1] = ctx.fpscr; | ||||||
|     state->VFP[2] = ctx.fpexc; |     state->VFP[2] = ctx.fpexc; | ||||||
| 
 | 
 | ||||||
|     state->Reg[15] = ctx.pc; |     state->Reg[15] = ctx.reg_15; | ||||||
|     state->NextInstr = RESUME; |     state->NextInstr = ctx.mode; | ||||||
| } | } | ||||||
| 
 | 
 | ||||||
| /// Prepare core for thread reschedule (if needed to correctly handle state)
 | /// Prepare core for thread reschedule (if needed to correctly handle state)
 | ||||||
|  |  | ||||||
|  | @ -29,6 +29,10 @@ struct ThreadContext { | ||||||
|     u32 fpu_registers[32]; |     u32 fpu_registers[32]; | ||||||
|     u32 fpscr; |     u32 fpscr; | ||||||
|     u32 fpexc; |     u32 fpexc; | ||||||
|  | 
 | ||||||
|  |     // These are not part of native ThreadContext, but needed by emu
 | ||||||
|  |     u32 reg_15; | ||||||
|  |     u32 mode; | ||||||
| }; | }; | ||||||
| 
 | 
 | ||||||
| enum ResetType { | enum ResetType { | ||||||
|  |  | ||||||
		Loading…
	
	Add table
		Add a link
		
	
		Reference in a new issue