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dyncom: Clarify precedence for ternary statements

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Lioncash 2015-01-19 20:25:31 -05:00
parent 004b23153b
commit 8c6edc680c
3 changed files with 3 additions and 3 deletions
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2
src/core/arm/dyncom/arm_dyncom_interpreter.cpp
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@ -4177,7 +4177,7 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
cpu->Reg[14] = (cpu->Reg[15] + GET_INST_SIZE(cpu)); cpu->Reg[14] = (cpu->Reg[15] + GET_INST_SIZE(cpu));
cpu->TFlag = 0x1; cpu->TFlag = 0x1;
int signed_int = inst_cream->val.signed_immed_24; int signed_int = inst_cream->val.signed_immed_24;
signed_int = (signed_int) & 0x800000 ? (0x3F000000 | signed_int) : signed_int; signed_int = (signed_int & 0x800000) ? (0x3F000000 | signed_int) : signed_int;
signed_int = signed_int << 2; signed_int = signed_int << 2;
cpu->Reg[15] = cpu->Reg[15] + 8 + signed_int + (BIT(inst, 24) << 1); cpu->Reg[15] = cpu->Reg[15] + 8 + signed_int + (BIT(inst, 24) << 1);
} }

2
src/core/arm/skyeye_common/vfp/vfpdouble.cpp
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@ -1400,7 +1400,7 @@ u32 vfp_double_cpdo(ARMul_State* state, u32 inst, u32 fpscr)
u32 except; u32 except;
char type; char type;
type = fop->flags & OP_SD ? 's' : 'd'; type = (fop->flags & OP_SD) ? 's' : 'd';
if (op == FOP_EXT) if (op == FOP_EXT)
pr_debug("VFP: itr%d (%c%u) = op[%u] (d%u)\n", pr_debug("VFP: itr%d (%c%u) = op[%u] (d%u)\n",
vecitr >> FPSCR_LENGTH_BIT, vecitr >> FPSCR_LENGTH_BIT,

2
src/core/arm/skyeye_common/vfp/vfpsingle.cpp
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@ -1290,7 +1290,7 @@ u32 vfp_single_cpdo(ARMul_State* state, u32 inst, u32 fpscr)
u32 except; u32 except;
char type; char type;
type = fop->flags & OP_DD ? 'd' : 's'; type = (fop->flags & OP_DD) ? 'd' : 's';
if (op == FOP_EXT) if (op == FOP_EXT)
pr_debug("VFP: itr%d (%c%u) = op[%u] (s%u=%08x)\n", pr_debug("VFP: itr%d (%c%u) = op[%u] (s%u=%08x)\n",
vecitr >> FPSCR_LENGTH_BIT, type, dest, sn, vecitr >> FPSCR_LENGTH_BIT, type, dest, sn,