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	armemu: Implement QADD8/QSUB8
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					 3 changed files with 100 additions and 33 deletions
				
			
		|  | @ -5948,56 +5948,58 @@ L_stm_s_takeabort: | ||||||
|                 printf("Unhandled v6 insn: %08x", instr); |                 printf("Unhandled v6 insn: %08x", instr); | ||||||
|             } |             } | ||||||
|             break; |             break; | ||||||
|         case 0x62: // QADD16, QASX, QSAX, and QSUB16
 |         case 0x62: // QADD16, QASX, QSAX, QSUB16, QADD8, and QSUB8
 | ||||||
|             if ((instr & 0xFF0) == 0xf10 || (instr & 0xFF0) == 0xf30 || |  | ||||||
|                 (instr & 0xFF0) == 0xf50 || (instr & 0xFF0) == 0xf70) |  | ||||||
|             { |             { | ||||||
|  |                 const u8 op2 = BITS(5, 7); | ||||||
|  | 
 | ||||||
|                 const u8 rd_idx = BITS(12, 15); |                 const u8 rd_idx = BITS(12, 15); | ||||||
|                 const u8 rn_idx = BITS(16, 19); |                 const u8 rn_idx = BITS(16, 19); | ||||||
|                 const u8 rm_idx = BITS(0, 3); |                 const u8 rm_idx = BITS(0, 3); | ||||||
|                 const s16 rm_lo = (state->Reg[rm_idx] & 0xFFFF); |                 const u16 rm_lo = (state->Reg[rm_idx] & 0xFFFF); | ||||||
|                 const s16 rm_hi = ((state->Reg[rm_idx] >> 0x10) & 0xFFFF); |                 const u16 rm_hi = ((state->Reg[rm_idx] >> 0x10) & 0xFFFF); | ||||||
|                 const s16 rn_lo = (state->Reg[rn_idx] & 0xFFFF); |                 const u16 rn_lo = (state->Reg[rn_idx] & 0xFFFF); | ||||||
|                 const s16 rn_hi = ((state->Reg[rn_idx] >> 0x10) & 0xFFFF); |                 const u16 rn_hi = ((state->Reg[rn_idx] >> 0x10) & 0xFFFF); | ||||||
| 
 | 
 | ||||||
|                 s32 lo_result; |                 u16 lo_result = 0; | ||||||
|                 s32 hi_result; |                 u16 hi_result = 0; | ||||||
| 
 | 
 | ||||||
|                 // QADD16
 |                 // QADD16
 | ||||||
|                 if ((instr & 0xFF0) == 0xf10) { |                 if (op2 == 0x00) { | ||||||
|                     lo_result = (rn_lo + rm_lo); |                     lo_result = ARMul_SignedSaturatedAdd16(rn_lo, rm_lo); | ||||||
|                     hi_result = (rn_hi + rm_hi); |                     hi_result = ARMul_SignedSaturatedAdd16(rn_hi, rm_hi); | ||||||
|                 } |                 } | ||||||
|                 // QASX
 |                 // QASX
 | ||||||
|                 else if ((instr & 0xFF0) == 0xf30) { |                 else if (op2 == 0x01) { | ||||||
|                     lo_result = (rn_lo - rm_hi); |                     lo_result = ARMul_SignedSaturatedSub16(rn_lo, rm_hi); | ||||||
|                     hi_result = (rn_hi + rm_lo); |                     hi_result = ARMul_SignedSaturatedAdd16(rn_hi, rm_lo); | ||||||
|                 } |                 } | ||||||
|                 // QSAX
 |                 // QSAX
 | ||||||
|                 else if ((instr & 0xFF0) == 0xf50) { |                 else if (op2 == 0x02) { | ||||||
|                     lo_result = (rn_lo + rm_hi); |                     lo_result = ARMul_SignedSaturatedAdd16(rn_lo, rm_hi); | ||||||
|                     hi_result = (rn_hi - rm_lo); |                     hi_result = ARMul_SignedSaturatedSub16(rn_hi, rm_lo); | ||||||
|                 } |                 } | ||||||
|                 // QSUB16
 |                 // QSUB16
 | ||||||
|                 else { |                 else if (op2 == 0x03) { | ||||||
|                     lo_result = (rn_lo - rm_lo); |                     lo_result = ARMul_SignedSaturatedSub16(rn_lo, rm_lo); | ||||||
|                     hi_result = (rn_hi - rm_hi); |                     hi_result = ARMul_SignedSaturatedSub16(rn_hi, rm_hi); | ||||||
|  |                 } | ||||||
|  |                 // QADD8
 | ||||||
|  |                 else if (op2 == 0x04) { | ||||||
|  |                     lo_result = ARMul_SignedSaturatedAdd8(rn_lo & 0xFF, rm_lo & 0xFF) | | ||||||
|  |                                 ARMul_SignedSaturatedAdd8(rn_lo >> 8, rm_lo >> 8) << 8; | ||||||
|  |                     hi_result = ARMul_SignedSaturatedAdd8(rn_hi & 0xFF, rm_hi & 0xFF) | | ||||||
|  |                                 ARMul_SignedSaturatedAdd8(rn_hi >> 8, rm_hi >> 8) << 8; | ||||||
|  |                 } | ||||||
|  |                 // QSUB8
 | ||||||
|  |                 else if (op2 == 0x07) { | ||||||
|  |                     lo_result = ARMul_SignedSaturatedSub8(rn_lo & 0xFF, rm_lo & 0xFF) | | ||||||
|  |                                 ARMul_SignedSaturatedSub8(rn_lo >> 8, rm_lo >> 8) << 8; | ||||||
|  |                     hi_result = ARMul_SignedSaturatedSub8(rn_hi & 0xFF, rm_hi & 0xFF) | | ||||||
|  |                                 ARMul_SignedSaturatedSub8(rn_hi >> 8, rm_hi >> 8) << 8; | ||||||
|                 } |                 } | ||||||
| 
 |  | ||||||
|                 if (lo_result > 0x7FFF) |  | ||||||
|                     lo_result = 0x7FFF; |  | ||||||
|                 else if (lo_result < -0x8000) |  | ||||||
|                     lo_result = -0x8000; |  | ||||||
| 
 |  | ||||||
|                 if (hi_result > 0x7FFF) |  | ||||||
|                     hi_result = 0x7FFF; |  | ||||||
|                 else if (hi_result < -0x8000) |  | ||||||
|                     hi_result = -0x8000; |  | ||||||
| 
 | 
 | ||||||
|                 state->Reg[rd_idx] = (lo_result & 0xFFFF) | ((hi_result & 0xFFFF) << 16); |                 state->Reg[rd_idx] = (lo_result & 0xFFFF) | ((hi_result & 0xFFFF) << 16); | ||||||
|                 return 1; |                 return 1; | ||||||
|             } else { |  | ||||||
|                 printf("Unhandled v6 insn: %08x", BITS(20, 27)); |  | ||||||
|             } |             } | ||||||
|             break; |             break; | ||||||
|         case 0x63: |         case 0x63: | ||||||
|  |  | ||||||
|  | @ -478,6 +478,66 @@ ARMul_SubOverflow (ARMul_State * state, ARMword a, ARMword b, ARMword result) | ||||||
|     ASSIGNV (SubOverflow (a, b, result)); |     ASSIGNV (SubOverflow (a, b, result)); | ||||||
| } | } | ||||||
| 
 | 
 | ||||||
|  | /* 8-bit signed saturated addition */ | ||||||
|  | u8 ARMul_SignedSaturatedAdd8(u8 left, u8 right) | ||||||
|  | { | ||||||
|  |     u8 result = left + right; | ||||||
|  | 
 | ||||||
|  |     if (((result ^ left) & 0x80) && ((left ^ right) & 0x80) == 0) { | ||||||
|  |         if (left & 0x80) | ||||||
|  |             result = 0x80; | ||||||
|  |         else | ||||||
|  |             result = 0x7F; | ||||||
|  |     } | ||||||
|  | 
 | ||||||
|  |     return result; | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | /* 8-bit signed saturated subtraction */ | ||||||
|  | u8 ARMul_SignedSaturatedSub8(u8 left, u8 right) | ||||||
|  | { | ||||||
|  |     u8 result = left - right; | ||||||
|  | 
 | ||||||
|  |     if (((result ^ left) & 0x80) && ((left ^ right) & 0x80) != 0) { | ||||||
|  |         if (left & 0x80) | ||||||
|  |             result = 0x80; | ||||||
|  |         else | ||||||
|  |             result = 0x7F; | ||||||
|  |     } | ||||||
|  | 
 | ||||||
|  |     return result; | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | /* 16-bit signed saturated addition */ | ||||||
|  | u16 ARMul_SignedSaturatedAdd16(u16 left, u16 right) | ||||||
|  | { | ||||||
|  |     u16 result = left + right; | ||||||
|  | 
 | ||||||
|  |     if (((result ^ left) & 0x8000) && ((left ^ right) & 0x8000) == 0) { | ||||||
|  |         if (left & 0x8000) | ||||||
|  |             result = 0x8000; | ||||||
|  |         else | ||||||
|  |             result = 0x7FFF; | ||||||
|  |     } | ||||||
|  | 
 | ||||||
|  |     return result; | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | /* 16-bit signed saturated subtraction */ | ||||||
|  | u16 ARMul_SignedSaturatedSub16(u16 left, u16 right) | ||||||
|  | { | ||||||
|  |     u16 result = left - right; | ||||||
|  | 
 | ||||||
|  |     if (((result ^ left) & 0x8000) && ((left ^ right) & 0x8000) != 0) { | ||||||
|  |         if (left & 0x8000) | ||||||
|  |             result = 0x8000; | ||||||
|  |         else | ||||||
|  |             result = 0x7FFF; | ||||||
|  |     } | ||||||
|  | 
 | ||||||
|  |     return result; | ||||||
|  | } | ||||||
|  | 
 | ||||||
| /* 8-bit unsigned saturated addition */ | /* 8-bit unsigned saturated addition */ | ||||||
| u8 ARMul_UnsignedSaturatedAdd8(u8 left, u8 right) | u8 ARMul_UnsignedSaturatedAdd8(u8 left, u8 right) | ||||||
| { | { | ||||||
|  |  | ||||||
|  | @ -790,6 +790,11 @@ extern void ARMul_FixSPSR(ARMul_State*, ARMword, ARMword); | ||||||
| extern void ARMul_ConsolePrint(ARMul_State*, const char*, ...); | extern void ARMul_ConsolePrint(ARMul_State*, const char*, ...); | ||||||
| extern void ARMul_SelectProcessor(ARMul_State*, unsigned); | extern void ARMul_SelectProcessor(ARMul_State*, unsigned); | ||||||
| 
 | 
 | ||||||
|  | extern u8 ARMul_SignedSaturatedAdd8(u8, u8); | ||||||
|  | extern u8 ARMul_SignedSaturatedSub8(u8, u8); | ||||||
|  | extern u16 ARMul_SignedSaturatedAdd16(u16, u16); | ||||||
|  | extern u16 ARMul_SignedSaturatedSub16(u16, u16); | ||||||
|  | 
 | ||||||
| extern u8 ARMul_UnsignedSaturatedAdd8(u8, u8); | extern u8 ARMul_UnsignedSaturatedAdd8(u8, u8); | ||||||
| extern u16 ARMul_UnsignedSaturatedAdd16(u16, u16); | extern u16 ARMul_UnsignedSaturatedAdd16(u16, u16); | ||||||
| extern u8 ARMul_UnsignedSaturatedSub8(u8, u8); | extern u8 ARMul_UnsignedSaturatedSub8(u8, u8); | ||||||
|  |  | ||||||
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