mirror of
				https://github.com/PabloMK7/citra.git
				synced 2025-10-30 21:30:04 +00:00 
			
		
		
		
	ARM: Synchronize Citra's SkyEye core with 3dmoo's.
This commit is contained in:
		
							parent
							
								
									866d2a62e9
								
							
						
					
					
						commit
						77fc029a00
					
				
					 6 changed files with 5553 additions and 6169 deletions
				
			
		|  | @ -12,6 +12,8 @@ ARM_Interpreter::ARM_Interpreter()  { | |||
|     state = new ARMul_State; | ||||
| 
 | ||||
|     ARMul_EmulateInit(); | ||||
|     memset(state, 0, sizeof(ARMul_State)); | ||||
| 
 | ||||
|     ARMul_NewState(state); | ||||
| 
 | ||||
|     state->abort_model = 0; | ||||
|  | @ -23,12 +25,14 @@ ARM_Interpreter::ARM_Interpreter()  { | |||
|     mmu_init(state); | ||||
| 
 | ||||
|     // Reset the core to initial state
 | ||||
|     ARMul_CoProInit(state);  | ||||
|     ARMul_Reset(state); | ||||
|     state->NextInstr = 0; | ||||
|     state->NextInstr = RESUME; | ||||
|     state->Emulate = 3; | ||||
| 
 | ||||
|     state->pc = state->Reg[15] = 0x00000000; | ||||
|     state->Reg[13] = 0x10000000; // Set stack pointer to the top of the stack
 | ||||
|     state->servaddr = 0xFFFF0000; | ||||
| } | ||||
| 
 | ||||
| ARM_Interpreter::~ARM_Interpreter() { | ||||
|  |  | |||
|  | @ -278,6 +278,11 @@ struct ARMul_State | |||
|     unsigned int NumScycles, NumNcycles, NumIcycles, NumCcycles, NumFcycles;    /* emulated cycles used */ | ||||
|     unsigned long long NumInstrs;    /* the number of instructions executed */ | ||||
|     unsigned NumInstrsToExecute; | ||||
| 
 | ||||
|     ARMword currentexaddr; | ||||
|     ARMword currentexval; | ||||
|     ARMword servaddr; | ||||
| 
 | ||||
|     unsigned NextInstr; | ||||
|     unsigned VectorCatch;    /* caught exception mask */ | ||||
|     unsigned CallDebug;    /* set to call the debugger */ | ||||
|  |  | |||
										
											
												File diff suppressed because it is too large
												Load diff
											
										
									
								
							|  | @ -18,10 +18,12 @@ | |||
| #define __ARMEMU_H__ | ||||
| 
 | ||||
| 
 | ||||
| #include "core/arm/interpreter/skyeye_defs.h" | ||||
| #include "core/arm/interpreter/armdefs.h" | ||||
| #include "armdefs.h" | ||||
| //#include "skyeye.h"
 | ||||
| 
 | ||||
| extern ARMword isize; | ||||
| //extern ARMword isize;
 | ||||
| 
 | ||||
| #define DEBUG(...) DEBUG_LOG(ARM11, __VA_ARGS__) | ||||
| 
 | ||||
| /* Condition code values.  */ | ||||
| #define EQ 0 | ||||
|  | @ -228,17 +230,6 @@ extern ARMword isize; | |||
|     }									\ | ||||
|   while (0) | ||||
| 
 | ||||
| #define SETABORT_SKIPBRANCH(i, m, d)						\ | ||||
|   do									\ | ||||
|     { 									\ | ||||
|       int SETABORT_mode = (m);						\ | ||||
| 									\ | ||||
|       ARMul_SetSPSR (state, SETABORT_mode, ARMul_GetCPSR (state));	\ | ||||
|       ARMul_SetCPSR (state, ((ARMul_GetCPSR (state) & ~(EMODE | TBIT))	\ | ||||
| 			     | (i) | SETABORT_mode));			\ | ||||
|     }									\ | ||||
|   while (0) | ||||
| 
 | ||||
| #ifndef MODE32 | ||||
| #define VECTORS 0x20 | ||||
| #define LEGALADDR 0x03ffffff | ||||
|  | @ -306,7 +297,7 @@ extern ARMword isize; | |||
|       if (! state->is_v4)					\ | ||||
|         {							\ | ||||
| 	  /* A standard PC inc and an S cycle.  */		\ | ||||
| 	  state->Reg[15] += isize;				\ | ||||
|       state->Reg[15] += INSN_SIZE;				\ | ||||
| 	  state->NextInstr = (state->NextInstr & 0xff) | 2;	\ | ||||
| 	}							\ | ||||
|     }								\ | ||||
|  | @ -320,7 +311,7 @@ extern ARMword isize; | |||
|       else						\ | ||||
| 	{						\ | ||||
| 	  /* A standard PC inc and an N cycle.  */	\ | ||||
| 	  state->Reg[15] += isize;			\ | ||||
|       state->Reg[15] += INSN_SIZE;			\ | ||||
| 	  state->NextInstr |= 3;			\ | ||||
| 	}						\ | ||||
|     }							\ | ||||
|  | @ -330,7 +321,7 @@ extern ARMword isize; | |||
|   do				\ | ||||
|     {				\ | ||||
|       /* A standard PC inc.  */	\ | ||||
|       state->Reg[15] += isize;	\ | ||||
|       state->Reg[15] += INSN_SIZE;	\ | ||||
|       state->NextInstr |= 2;	\ | ||||
|     }				\ | ||||
|   while (0) | ||||
|  | @ -420,9 +411,7 @@ extern ARMword isize; | |||
|      || (read_cp15_reg (15, 0, 1) & (1 << (CP)))) | ||||
| */ | ||||
| #define CP_ACCESS_ALLOWED(STATE, CP)			\ | ||||
|     (   ((CP) >= 14)					\ | ||||
|      || (! (STATE)->is_XScale)				\ | ||||
|      || (xscale_cp15_cp_access_allowed(STATE,15,CP))) | ||||
|     (   ((CP) >= 14)	)				\ | ||||
| 
 | ||||
| /* Macro to rotate n right by b bits.  */ | ||||
| #define ROTATER(n, b) (((n) >> (b)) | ((n) << (32 - (b)))) | ||||
|  |  | |||
|  | @ -15,16 +15,7 @@ | |||
|     along with this program; if not, write to the Free Software | ||||
|     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | ||||
| 
 | ||||
| 
 | ||||
| #include "common/platform.h" | ||||
| 
 | ||||
| #if EMU_PLATFORM == PLATFORM_LINUX | ||||
| #include <unistd.h> | ||||
| #elif EMU_PLATFORM == PLATFORM_WINDOWS | ||||
| #include <windows.h> | ||||
| #endif | ||||
| 
 | ||||
| #include <math.h> | ||||
| //#include <unistd.h>
 | ||||
| 
 | ||||
| #include "core/arm/interpreter/armdefs.h" | ||||
| #include "core/arm/interpreter/armemu.h" | ||||
|  | @ -42,8 +33,8 @@ ARMword ARMul_DoProg (ARMul_State * state); | |||
| ARMword ARMul_DoInstr (ARMul_State * state); | ||||
| void ARMul_Abort (ARMul_State * state, ARMword address); | ||||
| 
 | ||||
| unsigned ARMul_MultTable[32] = | ||||
| 	{ 1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, | ||||
| unsigned ARMul_MultTable[32] = { | ||||
|     1, 2, 2, 3, 3, 4, 4, 5, 5, 6, 6, 7, 7, 8, 8, 9, 9, | ||||
|     10, 10, 11, 11, 12, 12, 13, 13, 14, 14, 15, 15, 16, 16, 16 | ||||
| }; | ||||
| ARMword ARMul_ImmedTable[4096];	/* immediate DP LHS values */ | ||||
|  | @ -63,71 +54,27 @@ void arm_dyncom_Abort(ARMul_State * state, ARMword vector) | |||
| /* ahe-ykl : the following code to initialize user mode
 | ||||
|    code is architecture dependent and probably model dependant. */ | ||||
| 
 | ||||
| //#include "skyeye_arch.h"
 | ||||
| //#include "skyeye_pref.h"
 | ||||
| //#include "skyeye_exec_info.h"
 | ||||
| //#include "bank_defs.h"
 | ||||
| #include "armcpu.h" | ||||
| /*#include "skyeye_arch.h"
 | ||||
| #include "skyeye_pref.h" | ||||
| #include "skyeye_exec_info.h" | ||||
| #include "bank_defs.h"*/ | ||||
| //#include "armcpu.h"
 | ||||
| //#include "skyeye_callback.h"
 | ||||
| 
 | ||||
| //void arm_user_mode_init(generic_arch_t * arch_instance)
 | ||||
| //{
 | ||||
| //	sky_pref_t *pref = get_skyeye_pref();
 | ||||
| //	
 | ||||
| //	if (pref->user_mode_sim)
 | ||||
| //	{
 | ||||
| //		sky_exec_info_t *info = get_skyeye_exec_info();
 | ||||
| //		info->arch_page_size = 0x1000;
 | ||||
| //		info->arch_stack_top = 0x1ffffff0;// + 0x401fe7 - 0xff0; /* arbitrary value */
 | ||||
| //		/* stack initial address specific to architecture may be placed here */
 | ||||
| //		
 | ||||
| //		/* we need to mmap the stack space, if we are using skyeye space */
 | ||||
| //		if (info->mmap_access)
 | ||||
| //		{
 | ||||
| //			/* get system stack size */
 | ||||
| //			size_t stacksize = 0;
 | ||||
| //			pthread_attr_t attr;
 | ||||
| //			pthread_attr_init(&attr);
 | ||||
| //			pthread_attr_getstacksize(&attr, &stacksize);
 | ||||
| //			if (stacksize > info->arch_stack_top)
 | ||||
| //			{
 | ||||
| //				printf("arch_stack_top is too low\n");
 | ||||
| //				stacksize = info->arch_stack_top;
 | ||||
| //			}
 | ||||
| //			
 | ||||
| //			/* Note: Skyeye is occupating 0x400000 to 0x600000 */
 | ||||
| //			/* We do a mmap */
 | ||||
| //			void* ret = mmap( (info->arch_stack_top) - stacksize, 
 | ||||
| //				    stacksize + 0x1000 , PROT_READ | PROT_WRITE, MAP_ANONYMOUS | MAP_PRIVATE, -1, 0);
 | ||||
| //			if (ret == MAP_FAILED){
 | ||||
| //				/* ideally, we should find an empty space until it works */
 | ||||
| //				printf("mmap error, stack couldn't be mapped: errno %d\n", errno);
 | ||||
| //				exit(-1);
 | ||||
| //			} else {
 | ||||
| //				memset(ret, '\0', stacksize);
 | ||||
| //				//printf("stack top has been defined at %x size %x\n", (uint32_t) ret + stacksize, stacksize);
 | ||||
| //				//info->arch_stack_top = (uint32_t) ret + stacksize;
 | ||||
| //			}
 | ||||
| //		}
 | ||||
| //
 | ||||
| //		exec_stack_init();
 | ||||
| //		
 | ||||
| //		ARM_CPU_State* cpu = get_current_cpu();
 | ||||
| //		arm_core_t* core = &cpu->core[0];
 | ||||
| //
 | ||||
| //		uint32_t sp = info->initial_sp;
 | ||||
| //
 | ||||
| //		core->Cpsr = 0x10; /* User mode */
 | ||||
| //		/* FIXME: may need to add thumb */
 | ||||
| //		core->Reg[13] = sp;
 | ||||
| //		core->Reg[10] = info->start_data;
 | ||||
| //		core->Reg[0] = 0;
 | ||||
| //		bus_read(32, sp + 4, &(core->Reg[1]));
 | ||||
| //		bus_read(32, sp + 8, &(core->Reg[2]));
 | ||||
| //	}
 | ||||
| //
 | ||||
| //}
 | ||||
| /*
 | ||||
| 		ARM_CPU_State* cpu = get_current_cpu(); | ||||
| 		arm_core_t* core = &cpu->core[0]; | ||||
| 
 | ||||
| 		uint32_t sp = info->initial_sp; | ||||
| 
 | ||||
| 		core->Cpsr = 0x10; // User mode
 | ||||
| // FIXME: may need to add thumb
 | ||||
| core->Reg[13] = sp; | ||||
| core->Reg[10] = info->start_data; | ||||
| core->Reg[0] = 0; | ||||
| bus_read(32, sp + 4, &(core->Reg[1])); | ||||
| bus_read(32, sp + 8, &(core->Reg[2])); | ||||
| */ | ||||
| /***************************************************************************\
 | ||||
| *         Call this routine once to set up the emulator's tables.           * | ||||
| \***************************************************************************/ | ||||
|  | @ -195,6 +142,7 @@ ARMul_NewState (ARMul_State *state) | |||
|     if (state->EventPtr == NULL) { | ||||
|         printf ("SKYEYE: ARMul_NewState malloc state->EventPtr error\n"); | ||||
|         exit(-1); | ||||
|         //skyeye_exit (-1);
 | ||||
|     } | ||||
|     for (i = 0; i < EVENTLISTSIZE; i++) | ||||
|         *(state->EventPtr + i) = NULL; | ||||
|  | @ -224,9 +172,10 @@ ARMul_NewState (ARMul_State *state) | |||
|     state->CP14R0_CCD = -1; | ||||
| 
 | ||||
|     /* ahe-ykl: common function for interpret and dyncom */ | ||||
| 	//sky_pref_t *pref = get_skyeye_pref();
 | ||||
| 	//if (pref->user_mode_sim)
 | ||||
| 	//	register_callback(arm_user_mode_init, Bootmach_callback);
 | ||||
|     /*sky_pref_t *pref = get_skyeye_pref();
 | ||||
|     if (pref->user_mode_sim) | ||||
|     	register_callback(arm_user_mode_init, Bootmach_callback); | ||||
|         */ | ||||
| 
 | ||||
|     memset(&state->exclusive_tag_array[0], 0xFF, sizeof(state->exclusive_tag_array[0]) * 128); | ||||
|     state->exclusive_access_state = 0; | ||||
|  | @ -245,14 +194,13 @@ ARMul_SelectProcessor (ARMul_State * state, unsigned properties) | |||
|     if (properties & ARM_Fix26_Prop) { | ||||
|         state->prog32Sig = LOW; | ||||
|         state->data32Sig = LOW; | ||||
| 	} | ||||
| 	else { | ||||
|     } else { | ||||
|         state->prog32Sig = HIGH; | ||||
|         state->data32Sig = HIGH; | ||||
|     } | ||||
| /* 2004-05-09 chy
 | ||||
| below line sould be in skyeye_mach_XXX.c 's XXX_mach_init function | ||||
| */ | ||||
|     /* 2004-05-09 chy
 | ||||
|     below line sould be in skyeye_mach_XXX.c 's XXX_mach_init function | ||||
|     */ | ||||
|     // state->lateabtSig = HIGH;
 | ||||
| 
 | ||||
| 
 | ||||
|  | @ -274,7 +222,7 @@ below line sould be in skyeye_mach_XXX.c 's XXX_mach_init function | |||
| 
 | ||||
|     /* Only initialse the coprocessor support once we
 | ||||
|        know what kind of chip we are dealing with.  */ | ||||
| 	ARMul_CoProInit (state); | ||||
|     //ARMul_CoProInit (state);
 | ||||
| 
 | ||||
| } | ||||
| 
 | ||||
|  | @ -291,14 +239,13 @@ ARMul_Reset (ARMul_State * state) | |||
|         state->Reg[15] = 0; | ||||
|         state->Cpsr = INTBITS | SVC32MODE; | ||||
|         state->Mode = SVC32MODE; | ||||
| 	} | ||||
| 	else { | ||||
|     } else { | ||||
|         state->Reg[15] = R15INTBITS | SVC26MODE; | ||||
|         state->Cpsr = INTBITS | SVC26MODE; | ||||
|         state->Mode = SVC26MODE; | ||||
|     } | ||||
|     //fprintf(stderr,"armul_reset 1: state->  Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
 | ||||
| 	ARMul_CPSRAltered (state); | ||||
|     //ARMul_CPSRAltered (state);
 | ||||
|     state->Bank = SVCBANK; | ||||
|     FLUSHPIPE; | ||||
| 
 | ||||
|  | @ -321,7 +268,7 @@ ARMul_Reset (ARMul_State * state) | |||
|     state->NumFcycles = 0; | ||||
| 
 | ||||
|     //fprintf(stderr,"armul_reset 3: state->  Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
 | ||||
| 	mmu_reset (state); | ||||
|     //mmu_reset (state);
 | ||||
|     //fprintf(stderr,"armul_reset 4: state->  Cpsr 0x%x, Mode %d\n",state->Cpsr,state->Mode);
 | ||||
| 
 | ||||
|     //mem_reset (state); /* move to memory/ram.c */
 | ||||
|  | @ -341,7 +288,7 @@ ARMul_Reset (ARMul_State * state) | |||
|         //teawater add for arm2x86 2005.02.14-------------------------------------------
 | ||||
|         if (arm2x86_init (state)) { | ||||
|             printf ("SKYEYE: arm2x86_init error\n"); | ||||
| 			skyeye_exit (-1); | ||||
|             //skyeye_exit (-1);
 | ||||
|         } | ||||
|         //AJ2D--------------------------------------------------------------------------
 | ||||
|     } | ||||
|  | @ -362,7 +309,8 @@ static void | |||
| dbct_test_speed_sig(int signo) | ||||
| { | ||||
|     printf("\n0x%llx %llu\n", dbct_test_speed_state->instr_count, dbct_test_speed_state->instr_count); | ||||
| 	skyeye_exit(0); | ||||
|     exit(0); | ||||
|     //skyeye_exit(0);
 | ||||
| } | ||||
| #endif	//DBCT_TEST_SPEED
 | ||||
| //AJ2D--------------------------------------------------------------------------
 | ||||
|  | @ -396,12 +344,12 @@ ARMul_DoProg (ARMul_State * state) | |||
|             if (sigaction(SIGALRM, &act, NULL) == -1) { | ||||
| #endif	//__CYGWIN__
 | ||||
|                 fprintf(stderr, "init timer error.\n"); | ||||
| 				skyeye_exit(-1); | ||||
|                 exit(-1); | ||||
|                 //skyeye_exit(-1);
 | ||||
|             } | ||||
|             if (skyeye_config.dbct_test_speed_sec) { | ||||
|                 value.it_value.tv_sec = skyeye_config.dbct_test_speed_sec; | ||||
| 			} | ||||
| 			else { | ||||
|             } else { | ||||
|                 value.it_value.tv_sec = DBCT_TEST_SPEED_SEC; | ||||
|             } | ||||
|             printf("dbct_test_speed_sec = %ld\n", value.it_value.tv_sec); | ||||
|  | @ -414,7 +362,7 @@ ARMul_DoProg (ARMul_State * state) | |||
|             if (setitimer(ITIMER_REAL, &value, NULL) == -1) { | ||||
| #endif	//__CYGWIN__
 | ||||
|                 fprintf(stderr, "init timer error.\n"); | ||||
| 				skyeye_exit(-1); | ||||
|                 //skyeye_exit(-1);
 | ||||
|             } | ||||
|         } | ||||
|     } | ||||
|  | @ -429,8 +377,7 @@ ARMul_DoProg (ARMul_State * state) | |||
| #ifdef DBCT | ||||
|             if (skyeye_config.no_dbct) { | ||||
|                 pc = ARMul_Emulate32 (state); | ||||
| 			} | ||||
| 			else { | ||||
|             } else { | ||||
|                 pc = ARMul_Emulate32_dbct (state); | ||||
|             } | ||||
| #else | ||||
|  | @ -439,7 +386,7 @@ ARMul_DoProg (ARMul_State * state) | |||
|         } | ||||
| 
 | ||||
|         else { | ||||
| 			_dbg_assert_msg_(ARM11, false, "Unsupported ARM 26-bit Mode!"); | ||||
|             //pc = ARMul_Emulate26 (state);
 | ||||
|         } | ||||
|         //chy 2006-02-22, should test debugmode first
 | ||||
|         //chy 2006-04-14, put below codes in ARMul_Emulate
 | ||||
|  | @ -476,8 +423,7 @@ ARMul_DoInstr (ARMul_State * state) | |||
| #ifdef DBCT | ||||
|         if (skyeye_config.no_dbct) { | ||||
|             pc = ARMul_Emulate32 (state); | ||||
| 		} | ||||
| 		else { | ||||
|         } else { | ||||
| //teawater add compile switch for DBCT GDB RSP function 2005.10.21--------------
 | ||||
| #ifndef DBCT_GDBRSP | ||||
|             printf("DBCT GDBRSP function switch is off.\n"); | ||||
|  | @ -492,9 +438,8 @@ ARMul_DoInstr (ARMul_State * state) | |||
| #endif | ||||
|     } | ||||
| 
 | ||||
| 	else { | ||||
| 		_dbg_assert_msg_(ARM11, false, "Unsupported ARM 26-bit Mode!"); | ||||
| 	} | ||||
|     //else
 | ||||
|     //pc = ARMul_Emulate26 (state);
 | ||||
| 
 | ||||
|     return (pc); | ||||
| } | ||||
|  | @ -533,13 +478,9 @@ ARMul_Abort (ARMul_State * state, ARMword vector) | |||
|                   isize); | ||||
|         break; | ||||
|     case ARMul_SWIV:	/* Software Interrupt */ | ||||
| 		// Modified SETABORT that doesn't branch to a SVC vector as we are implementing this in HLE
 | ||||
| 		// Instead of doing normal routine, backup R15 by one instruction (this is what PC will get 
 | ||||
| 		// set to, making it the next instruction after the SVC call), and skip setting the LR.
 | ||||
| 		SETABORT_SKIPBRANCH (IBIT, state->prog32Sig ? SVC32MODE : SVC26MODE, | ||||
|         SETABORT (IBIT, state->prog32Sig ? SVC32MODE : SVC26MODE, | ||||
|                   isize); | ||||
| 		state->Reg[15] -= 4; | ||||
| 		return; | ||||
|         break; | ||||
|     case ARMul_PrefetchAbortV:	/* Prefetch Abort */ | ||||
|         state->AbortAddr = 1; | ||||
|         SETABORT (IBIT, state->prog32Sig ? ABORT32MODE : SVC26MODE, | ||||
|  | @ -575,12 +516,11 @@ ARMul_Abort (ARMul_State * state, ARMword vector) | |||
|     } | ||||
| 
 | ||||
|     if (ARMul_MODE32BIT) { | ||||
| 		if (state->mmu.control & CONTROL_VECTOR) | ||||
| 			vector += 0xffff0000;	//for v4 high exception  address
 | ||||
|         /*if (state->mmu.control & CONTROL_VECTOR)
 | ||||
|           vector += 0xffff0000;	//for v4 high exception  address*/
 | ||||
|         if (state->vector_remap_flag) | ||||
|             vector += state->vector_remap_addr; /* support some remap function in LPC processor */ | ||||
|         ARMul_SetR15 (state, vector); | ||||
| 	} | ||||
| 	else | ||||
|     } else | ||||
|         ARMul_SetR15 (state, R15CCINTMODE | vector); | ||||
| } | ||||
|  |  | |||
|  | @ -15,22 +15,23 @@ | |||
|     along with this program; if not, write to the Free Software | ||||
|     Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */ | ||||
| 
 | ||||
| //#include <util.h>
 | ||||
| 
 | ||||
| #include "core/arm/interpreter/armdefs.h" | ||||
| #include "core/arm/interpreter/armemu.h" | ||||
| #include "core/arm/interpreter/skyeye_defs.h" | ||||
| #include "core/hle/coprocessor.h" | ||||
| #include "core/arm/disassembler/arm_disasm.h" | ||||
| 
 | ||||
| unsigned xscale_cp15_cp_access_allowed (ARMul_State * state, unsigned reg, | ||||
|                                         unsigned cpnum); | ||||
| //#include "ansidecl.h"
 | ||||
| //#include "skyeye.h"
 | ||||
| //extern int skyeye_instr_debug;
 | ||||
| /* Definitions for the support routines.  */ | ||||
| 
 | ||||
| static ARMword ModeToBank (ARMword); | ||||
| static void EnvokeList (ARMul_State *, unsigned int, unsigned int); | ||||
| 
 | ||||
| struct EventNode | ||||
| {				/* An event list node.  */ | ||||
| struct EventNode { | ||||
|     /* An event list node.  */ | ||||
|     unsigned (*func) (ARMul_State *);	/* The function to call.  */ | ||||
|     struct EventNode *next; | ||||
| }; | ||||
|  | @ -76,9 +77,9 @@ ARMword | |||
| ARMul_GetNextPC (ARMul_State * state) | ||||
| { | ||||
|     if (state->Mode > SVC26MODE) | ||||
| 		return state->Reg[15] + isize; | ||||
|         return state->Reg[15] + INSN_SIZE; | ||||
|     else | ||||
| 		return (state->Reg[15] + isize) & R15PCBITS; | ||||
|         return (state->Reg[15] + INSN_SIZE) & R15PCBITS; | ||||
| } | ||||
| 
 | ||||
| /* This routine sets the value of the PC.  */ | ||||
|  | @ -213,13 +214,13 @@ ARMul_CPSRAltered (ARMul_State * state) | |||
| 
 | ||||
|     oldmode = state->Mode; | ||||
| 
 | ||||
| 	if (state->Mode != (state->Cpsr & MODEBITS)) { | ||||
|     /*if (state->Mode != (state->Cpsr & MODEBITS)) {
 | ||||
|     	state->Mode = | ||||
|     		ARMul_SwitchMode (state, state->Mode, | ||||
|     				  state->Cpsr & MODEBITS); | ||||
| 
 | ||||
|     	state->NtransSig = (state->Mode & 3) ? HIGH : LOW; | ||||
| 	} | ||||
|     }*/ | ||||
|     //state->Cpsr &= ~MODEBITS;
 | ||||
| 
 | ||||
|     ASSIGNINT (state->Cpsr & INTBITS); | ||||
|  | @ -244,13 +245,11 @@ ARMul_CPSRAltered (ARMul_State * state) | |||
|             state->Emulate = CHANGEMODE; | ||||
|             state->Reg[15] = ECC | ER15INT | EMODE | R15PC; | ||||
|         } | ||||
| 	} | ||||
| 	else { | ||||
|     } else { | ||||
|         if (state->Mode > SVC26MODE) { | ||||
|             state->Emulate = CHANGEMODE; | ||||
|             state->Reg[15] = R15PC; | ||||
| 		} | ||||
| 		else | ||||
|         } else | ||||
|             state->Reg[15] = ECC | ER15INT | EMODE | R15PC; | ||||
|     } | ||||
| } | ||||
|  | @ -406,12 +405,10 @@ ARMul_NegZero (ARMul_State * state, ARMword result) | |||
|     if (NEG (result)) { | ||||
|         SETN; | ||||
|         CLEARZ; | ||||
| 	} | ||||
| 	else if (result == 0) { | ||||
|     } else if (result == 0) { | ||||
|         CLEARN; | ||||
|         SETZ; | ||||
| 	} | ||||
| 	else { | ||||
|     } else { | ||||
|         CLEARN; | ||||
|         CLEARZ; | ||||
|     } | ||||
|  | @ -482,12 +479,13 @@ ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address) | |||
| 
 | ||||
|     UNDEF_LSCPCBaseWb; | ||||
|     //printf("SKYEYE ARMul_LDC, CPnum is %x, instr %x, addr %x\n",CPNum, instr, address);
 | ||||
| /*chy 2004-05-23 should update this function in the future,should concern dataabort*/ | ||||
|     /*chy 2004-05-23 should update this function in the future,should concern dataabort*/ | ||||
| // chy 2004-05-25 , fix it now,so needn't printf
 | ||||
| //  printf("SKYEYE ARMul_LDC, should update this function!!!!!\n");
 | ||||
|     //exit(-1);
 | ||||
| 
 | ||||
| 	if (!CP_ACCESS_ALLOWED (state, CPNum)) { | ||||
|     //if (!CP_ACCESS_ALLOWED (state, CPNum)) {
 | ||||
|     if (!state->LDC[CPNum]) { | ||||
|         /*
 | ||||
|            printf | ||||
|            ("SKYEYE ARMul_LDC,NOT ALLOW, underinstr, CPnum is %x, instr %x, addr %x\n", | ||||
|  | @ -497,8 +495,8 @@ ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address) | |||
|         return; | ||||
|     } | ||||
| 
 | ||||
| 	//if (ADDREXCEPT (address))
 | ||||
| 	//	INTERNALABORT (address);
 | ||||
|     /*if (ADDREXCEPT (address))
 | ||||
|           INTERNALABORT (address);*/ | ||||
| 
 | ||||
|     cpab = (state->LDC[CPNum]) (state, ARMul_FIRST, instr, 0); | ||||
|     while (cpab == ARMul_BUSY) { | ||||
|  | @ -508,8 +506,7 @@ ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address) | |||
|             cpab = (state->LDC[CPNum]) (state, ARMul_INTERRUPT, | ||||
|                                         instr, 0); | ||||
|             return; | ||||
| 		} | ||||
| 		else | ||||
|         } else | ||||
|             cpab = (state->LDC[CPNum]) (state, ARMul_BUSY, instr, | ||||
|                                         0); | ||||
|     } | ||||
|  | @ -531,10 +528,10 @@ ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address) | |||
| 
 | ||||
|     BUSUSEDINCPCN; | ||||
| //chy 2004-05-25
 | ||||
| /*
 | ||||
|     /*
 | ||||
|       if (BIT (21)) | ||||
|         LSBase = state->Base; | ||||
| */ | ||||
|     */ | ||||
| 
 | ||||
|     cpab = (state->LDC[CPNum]) (state, ARMul_DATA, instr, data); | ||||
| 
 | ||||
|  | @ -549,7 +546,7 @@ ARMul_LDC (ARMul_State * state, ARMword instr, ARMword address) | |||
|     } | ||||
| 
 | ||||
| //chy 2004-05-25
 | ||||
|       L_ldc_takeabort: | ||||
| L_ldc_takeabort: | ||||
|     if (BIT (21)) { | ||||
|         if (! | ||||
|                 ((state->abortSig || state->Aborted) | ||||
|  | @ -581,7 +578,8 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address) | |||
| //  printf("SKYEYE ARMul_STC, should update this function!!!!!\n");
 | ||||
| 
 | ||||
|     //exit(-1);
 | ||||
| 	if (!CP_ACCESS_ALLOWED (state, CPNum)) { | ||||
|     //if (!CP_ACCESS_ALLOWED (state, CPNum)) {
 | ||||
|     if (!state->STC[CPNum]) { | ||||
|         /*
 | ||||
|            printf | ||||
|            ("SKYEYE ARMul_STC,NOT ALLOW, undefinstr,  CPnum is %x, instr %x, addr %x\n", | ||||
|  | @ -591,8 +589,8 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address) | |||
|         return; | ||||
|     } | ||||
| 
 | ||||
| 	//if (ADDREXCEPT (address) || VECTORACCESS (address))
 | ||||
| 	//	INTERNALABORT (address);
 | ||||
|     /*if (ADDREXCEPT (address) || VECTORACCESS (address))
 | ||||
|           INTERNALABORT (address);*/ | ||||
| 
 | ||||
|     cpab = (state->STC[CPNum]) (state, ARMul_FIRST, instr, &data); | ||||
|     while (cpab == ARMul_BUSY) { | ||||
|  | @ -601,8 +599,7 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address) | |||
|             cpab = (state->STC[CPNum]) (state, ARMul_INTERRUPT, | ||||
|                                         instr, 0); | ||||
|             return; | ||||
| 		} | ||||
| 		else | ||||
|         } else | ||||
|             cpab = (state->STC[CPNum]) (state, ARMul_BUSY, instr, | ||||
|                                         &data); | ||||
|     } | ||||
|  | @ -616,16 +613,16 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address) | |||
|         CPTAKEABORT; | ||||
|         return; | ||||
|     } | ||||
| #ifndef MODE32 | ||||
|     /*#ifndef MODE32
 | ||||
|     	if (ADDREXCEPT (address) || VECTORACCESS (address)) | ||||
|     		INTERNALABORT (address); | ||||
| #endif | ||||
|                     #endif*/ | ||||
|     BUSUSEDINCPCN; | ||||
| //chy 2004-05-25
 | ||||
| /*
 | ||||
|     /*
 | ||||
|       if (BIT (21)) | ||||
|         LSBase = state->Base; | ||||
| */ | ||||
|     */ | ||||
|     cpab = (state->STC[CPNum]) (state, ARMul_DATA, instr, &data); | ||||
|     ARMul_StoreWordN (state, address, data); | ||||
|     //chy 2004-05-25
 | ||||
|  | @ -641,7 +638,7 @@ ARMul_STC (ARMul_State * state, ARMword instr, ARMword address) | |||
|             goto L_stc_takeabort; | ||||
|     } | ||||
| //chy 2004-05-25
 | ||||
|       L_stc_takeabort: | ||||
| L_stc_takeabort: | ||||
|     if (BIT (21)) { | ||||
|         if (! | ||||
|                 ((state->abortSig || state->Aborted) | ||||
|  | @ -659,15 +656,31 @@ void | |||
| ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source) | ||||
| { | ||||
|     unsigned cpab; | ||||
|     int cm = BITS(0, 3) & 0xf; | ||||
|     int cp = BITS(5, 7) & 0x7; | ||||
|     int rd = BITS(12, 15) & 0xf; | ||||
|     int cn = BITS(16, 19) & 0xf; | ||||
|     int cpopc = BITS(21, 23) & 0x7; | ||||
| 
 | ||||
|     if (CPNum == 15 && source == 0) //Cache flush
 | ||||
|     { | ||||
|         return; | ||||
|     } | ||||
| 
 | ||||
|     //printf("SKYEYE ARMul_MCR, CPnum is %x, source %x\n",CPNum, source);
 | ||||
| 	if (!CP_ACCESS_ALLOWED (state, CPNum)) { | ||||
|     //if (!CP_ACCESS_ALLOWED (state, CPNum)) {
 | ||||
|     if (!state->MCR[CPNum]) { | ||||
|         //chy 2004-07-19 should fix in the future ????!!!!
 | ||||
| 		//printf("SKYEYE ARMul_MCR, ACCESS_not ALLOWed, UndefinedInstr  CPnum is %x, source %x\n",CPNum, source);
 | ||||
|         DEBUG("SKYEYE ARMul_MCR, ACCESS_not ALLOWed, UndefinedInstr  CPnum is %x, source %x\n",CPNum, source); | ||||
|         ARMul_UndefInstr (state, instr); | ||||
|         return; | ||||
|     } | ||||
| 
 | ||||
|     //DEBUG("SKYEYE ARMul_MCR p%d, %d, r%d, c%d, c%d, %d\n", CPNum, cpopc, rd, cn, cm, cp);
 | ||||
|     //DEBUG("plutoo: MCR not implemented\n");
 | ||||
|     //exit(1);
 | ||||
|     //return;
 | ||||
| 
 | ||||
|     cpab = (state->MCR[CPNum]) (state, ARMul_FIRST, instr, source); | ||||
| 
 | ||||
|     while (cpab == ARMul_BUSY) { | ||||
|  | @ -677,17 +690,15 @@ ARMul_MCR (ARMul_State * state, ARMword instr, ARMword source) | |||
|             cpab = (state->MCR[CPNum]) (state, ARMul_INTERRUPT, | ||||
|                                         instr, 0); | ||||
|             return; | ||||
| 		} | ||||
| 		else | ||||
|         } else | ||||
|             cpab = (state->MCR[CPNum]) (state, ARMul_BUSY, instr, | ||||
|                                         source); | ||||
|     } | ||||
| 
 | ||||
|     if (cpab == ARMul_CANT) { | ||||
| 		printf ("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source); | ||||
| 		ARMul_Abort (state, ARMul_UndefinedInstrV); | ||||
| 	} | ||||
| 	else { | ||||
|         DEBUG("SKYEYE ARMul_MCR, CANT, UndefinedInstr %x CPnum is %x, source %x\n", instr, CPNum, source); //ichfly todo
 | ||||
|         //ARMul_Abort (state, ARMul_UndefinedInstrV);
 | ||||
|     } else { | ||||
|         BUSUSEDINCPCN; | ||||
|         ARMul_Ccycles (state, 1, 0); | ||||
|     } | ||||
|  | @ -700,7 +711,8 @@ ARMul_MCRR (ARMul_State * state, ARMword instr, ARMword source1, ARMword source2 | |||
| { | ||||
|     unsigned cpab; | ||||
| 
 | ||||
| 	if (!CP_ACCESS_ALLOWED (state, CPNum)) { | ||||
|     //if (!CP_ACCESS_ALLOWED (state, CPNum)) {
 | ||||
|     if (!state->MCRR[CPNum]) { | ||||
|         ARMul_UndefInstr (state, instr); | ||||
|         return; | ||||
|     } | ||||
|  | @ -714,16 +726,14 @@ ARMul_MCRR (ARMul_State * state, ARMword instr, ARMword source1, ARMword source2 | |||
|             cpab = (state->MCRR[CPNum]) (state, ARMul_INTERRUPT, | ||||
|                                          instr, 0, 0); | ||||
|             return; | ||||
| 		} | ||||
| 		else | ||||
|         } else | ||||
|             cpab = (state->MCRR[CPNum]) (state, ARMul_BUSY, instr, | ||||
|                                          source1, source2); | ||||
|     } | ||||
|     if (cpab == ARMul_CANT) { | ||||
|         printf ("In %s, CoProcesscor returned CANT, CPnum is %x, instr %x, source %x %x\n", __FUNCTION__, CPNum, instr, source1, source2); | ||||
|         ARMul_Abort (state, ARMul_UndefinedInstrV); | ||||
| 	} | ||||
| 	else { | ||||
|     } else { | ||||
|         BUSUSEDINCPCN; | ||||
|         ARMul_Ccycles (state, 1, 0); | ||||
|     } | ||||
|  | @ -731,21 +741,34 @@ ARMul_MCRR (ARMul_State * state, ARMword instr, ARMword source1, ARMword source2 | |||
| 
 | ||||
| /* This function does the Busy-Waiting for an MRC instruction.  */ | ||||
| 
 | ||||
| ARMword | ||||
| ARMul_MRC (ARMul_State * state, ARMword instr) | ||||
| ARMword ARMul_MRC (ARMul_State * state, ARMword instr) | ||||
| { | ||||
| 	unsigned cpab; | ||||
|     int cm = BITS(0, 3) & 0xf; | ||||
|     int cp = BITS(5, 7) & 0x7; | ||||
|     int rd = BITS(12, 15) & 0xf; | ||||
|     int cn = BITS(16, 19) & 0xf; | ||||
|     int cpopc = BITS(21, 23) & 0x7; | ||||
| 
 | ||||
|     if (cn == 13 && cm == 0 && cp == 3) { //c13,c0,3; returns CPU svc buffer
 | ||||
| 	ARMword result = HLE::CallMRC(instr); | ||||
| 
 | ||||
| 	if (result != -1) { | ||||
| 		return result; | ||||
| 	} | ||||
|     } | ||||
| 
 | ||||
|     //DEBUG("SKYEYE ARMul_MRC p%d, %d, r%d, c%d, c%d, %d\n", CPNum, cpopc, rd, cn, cm, cp);
 | ||||
|     //DEBUG("plutoo: MRC not implemented\n");
 | ||||
|     //return;
 | ||||
| 
 | ||||
|     unsigned cpab; | ||||
|     ARMword result = 0; | ||||
| 
 | ||||
|     //printf("SKYEYE ARMul_MRC, CPnum is %x, instr %x\n",CPNum, instr);
 | ||||
| 	if (!CP_ACCESS_ALLOWED (state, CPNum)) { | ||||
|     //if (!CP_ACCESS_ALLOWED (state, CPNum)) {
 | ||||
|     if (!state->MRC[CPNum]) { | ||||
|         //chy 2004-07-19 should fix in the future????!!!!
 | ||||
| 		//printf("SKYEYE ARMul_MRC,NOT ALLOWed UndefInstr  CPnum is %x, instr %x\n",CPNum, instr);
 | ||||
|         DEBUG("SKYEYE ARMul_MRC,NOT ALLOWed UndefInstr  CPnum is %x, instr %x\n", CPNum, instr); | ||||
|         ARMul_UndefInstr (state, instr); | ||||
|         return -1; | ||||
|     } | ||||
|  | @ -757,8 +780,7 @@ ARMul_MRC (ARMul_State * state, ARMword instr) | |||
|             cpab = (state->MRC[CPNum]) (state, ARMul_INTERRUPT, | ||||
|                                         instr, 0); | ||||
|             return (0); | ||||
| 		} | ||||
| 		else | ||||
|         } else | ||||
|             cpab = (state->MRC[CPNum]) (state, ARMul_BUSY, instr, | ||||
|                                         &result); | ||||
|     } | ||||
|  | @ -767,8 +789,7 @@ ARMul_MRC (ARMul_State * state, ARMword instr) | |||
|         ARMul_Abort (state, ARMul_UndefinedInstrV); | ||||
|         /* Parent will destroy the flags otherwise.  */ | ||||
|         result = ECC; | ||||
| 	} | ||||
| 	else { | ||||
|     } else { | ||||
|         BUSUSEDINCPCN; | ||||
|         ARMul_Ccycles (state, 1, 0); | ||||
|         ARMul_Icycles (state, 1, 0); | ||||
|  | @ -786,7 +807,8 @@ ARMul_MRRC (ARMul_State * state, ARMword instr, ARMword * dest1, ARMword * dest2 | |||
|     ARMword result1 = 0; | ||||
|     ARMword result2 = 0; | ||||
| 
 | ||||
| 	if (!CP_ACCESS_ALLOWED (state, CPNum)) { | ||||
|     //if (!CP_ACCESS_ALLOWED (state, CPNum)) {
 | ||||
|     if (!state->MRRC[CPNum]) { | ||||
|         ARMul_UndefInstr (state, instr); | ||||
|         return; | ||||
|     } | ||||
|  | @ -798,16 +820,14 @@ ARMul_MRRC (ARMul_State * state, ARMword instr, ARMword * dest1, ARMword * dest2 | |||
|             cpab = (state->MRRC[CPNum]) (state, ARMul_INTERRUPT, | ||||
|                                          instr, 0, 0); | ||||
|             return; | ||||
| 		} | ||||
| 		else | ||||
|         } else | ||||
|             cpab = (state->MRRC[CPNum]) (state, ARMul_BUSY, instr, | ||||
|                                          &result1, &result2); | ||||
|     } | ||||
|     if (cpab == ARMul_CANT) { | ||||
|         printf ("In %s, CoProcesscor returned CANT, CPnum is %x, instr %x\n", __FUNCTION__, CPNum, instr); | ||||
|         ARMul_Abort (state, ARMul_UndefinedInstrV); | ||||
| 	} | ||||
| 	else { | ||||
|     } else { | ||||
|         BUSUSEDINCPCN; | ||||
|         ARMul_Ccycles (state, 1, 0); | ||||
|         ARMul_Icycles (state, 1, 0); | ||||
|  | @ -824,7 +844,8 @@ ARMul_CDP (ARMul_State * state, ARMword instr) | |||
| { | ||||
|     unsigned cpab; | ||||
| 
 | ||||
| 	if (!CP_ACCESS_ALLOWED (state, CPNum)) { | ||||
|     //if (!CP_ACCESS_ALLOWED (state, CPNum)) {
 | ||||
|     if (!state->CDP[CPNum]) { | ||||
|         ARMul_UndefInstr (state, instr); | ||||
|         return; | ||||
|     } | ||||
|  | @ -835,8 +856,7 @@ ARMul_CDP (ARMul_State * state, ARMword instr) | |||
|             cpab = (state->CDP[CPNum]) (state, ARMul_INTERRUPT, | ||||
|                                         instr); | ||||
|             return; | ||||
| 		} | ||||
| 		else | ||||
|         } else | ||||
|             cpab = (state->CDP[CPNum]) (state, ARMul_BUSY, instr); | ||||
|     } | ||||
|     if (cpab == ARMul_CANT) | ||||
|  | @ -850,6 +870,8 @@ ARMul_CDP (ARMul_State * state, ARMword instr) | |||
| void | ||||
| ARMul_UndefInstr (ARMul_State * state, ARMword instr) | ||||
| { | ||||
|     /*SKYEYE_LOG_IN_CLR(RED, "In %s, line = %d, undef instr: 0x%x\n",
 | ||||
|       __func__, __LINE__, instr);*/ | ||||
|     char buff[512]; | ||||
|     ARM_Disasm disasm = ARM_Disasm(); | ||||
|     disasm.disasm(state->pc, instr, buff); | ||||
|  | @ -866,12 +888,10 @@ IntPending (ARMul_State * state) | |||
|     if (state->NresetSig == LOW) { | ||||
|         ARMul_Abort (state, ARMul_ResetV); | ||||
|         return TRUE; | ||||
| 	} | ||||
| 	else if (!state->NfiqSig && !FFLAG) { | ||||
|     } else if (!state->NfiqSig && !FFLAG) { | ||||
|         ARMul_Abort (state, ARMul_FIQV); | ||||
|         return TRUE; | ||||
| 	} | ||||
| 	else if (!state->NirqSig && !IFLAG) { | ||||
|     } else if (!state->NirqSig && !IFLAG) { | ||||
|         ARMul_Abort (state, ARMul_IRQV); | ||||
|         return TRUE; | ||||
|     } | ||||
|  | @ -882,7 +902,7 @@ IntPending (ARMul_State * state) | |||
| /* Align a word access to a non word boundary.  */ | ||||
| 
 | ||||
| ARMword | ||||
| ARMul_Align (ARMul_State *state, ARMword address, ARMword data) | ||||
| ARMul_Align (ARMul_State* state, ARMword address, ARMword data) | ||||
| { | ||||
|     /* This code assumes the address is really unaligned,
 | ||||
|        as a shift by 32 is undefined in C.  */ | ||||
|  | @ -907,7 +927,11 @@ ARMul_ScheduleEvent (ARMul_State * state, unsigned int delay, | |||
|         state->Now = ARMul_Time (state); | ||||
|     when = (state->Now + delay) % EVENTLISTSIZE; | ||||
|     event = (struct EventNode *) malloc (sizeof (struct EventNode)); | ||||
| 	_dbg_assert_msg_(ARM11, event, "SKYEYE:ARMul_ScheduleEvent: malloc event error\n"); | ||||
|     if (!event) { | ||||
|         printf ("SKYEYE:ARMul_ScheduleEvent: malloc event error\n"); | ||||
|         exit(-1); | ||||
|         //skyeye_exit (-1);
 | ||||
|     } | ||||
|     event->func = what; | ||||
|     event->next = *(state->EventPtr + when); | ||||
|     *(state->EventPtr + when) = event; | ||||
|  |  | |||
		Loading…
	
	Add table
		Add a link
		
	
		Reference in a new issue