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	ARM_Interface: Implement PageTableChanged
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					 6 changed files with 39 additions and 6 deletions
				
			
		|  | @ -41,6 +41,9 @@ public: | |||
|     /// Clear all instruction cache
 | ||||
|     virtual void ClearInstructionCache() = 0; | ||||
| 
 | ||||
|     /// Notify CPU emulation that page tables have changed
 | ||||
|     virtual void PageTableChanged() = 0; | ||||
| 
 | ||||
|     /**
 | ||||
|      * Set the Program Counter to an address | ||||
|      * @param addr Address to set PC to | ||||
|  |  | |||
|  | @ -41,7 +41,7 @@ static bool IsReadOnlyMemory(u32 vaddr) { | |||
| } | ||||
| 
 | ||||
| static Dynarmic::UserCallbacks GetUserCallbacks( | ||||
|     const std::shared_ptr<ARMul_State>& interpeter_state) { | ||||
|     const std::shared_ptr<ARMul_State>& interpeter_state, Memory::PageTable* current_page_table) { | ||||
|     Dynarmic::UserCallbacks user_callbacks{}; | ||||
|     user_callbacks.InterpreterFallback = &InterpreterFallback; | ||||
|     user_callbacks.user_arg = static_cast<void*>(interpeter_state.get()); | ||||
|  | @ -56,16 +56,14 @@ static Dynarmic::UserCallbacks GetUserCallbacks( | |||
|     user_callbacks.memory.Write16 = &Memory::Write16; | ||||
|     user_callbacks.memory.Write32 = &Memory::Write32; | ||||
|     user_callbacks.memory.Write64 = &Memory::Write64; | ||||
|     // TODO(Subv): Re-add the page table pointers once dynarmic supports switching page tables at
 | ||||
|     // runtime.
 | ||||
|     user_callbacks.page_table = nullptr; | ||||
|     user_callbacks.page_table = ¤t_page_table->pointers; | ||||
|     user_callbacks.coprocessors[15] = std::make_shared<DynarmicCP15>(interpeter_state); | ||||
|     return user_callbacks; | ||||
| } | ||||
| 
 | ||||
| ARM_Dynarmic::ARM_Dynarmic(PrivilegeMode initial_mode) { | ||||
|     interpreter_state = std::make_shared<ARMul_State>(initial_mode); | ||||
|     jit = std::make_unique<Dynarmic::Jit>(GetUserCallbacks(interpreter_state)); | ||||
|     PageTableChanged(); | ||||
| } | ||||
| 
 | ||||
| void ARM_Dynarmic::SetPC(u32 pc) { | ||||
|  | @ -136,6 +134,7 @@ void ARM_Dynarmic::AddTicks(u64 ticks) { | |||
| MICROPROFILE_DEFINE(ARM_Jit, "ARM JIT", "ARM JIT", MP_RGB(255, 64, 64)); | ||||
| 
 | ||||
| void ARM_Dynarmic::ExecuteInstructions(int num_instructions) { | ||||
|     ASSERT(Memory::GetCurrentPageTable() == current_page_table); | ||||
|     MICROPROFILE_SCOPE(ARM_Jit); | ||||
| 
 | ||||
|     std::size_t ticks_executed = jit->Run(static_cast<unsigned>(num_instructions)); | ||||
|  | @ -178,3 +177,16 @@ void ARM_Dynarmic::PrepareReschedule() { | |||
| void ARM_Dynarmic::ClearInstructionCache() { | ||||
|     jit->ClearCache(); | ||||
| } | ||||
| 
 | ||||
| void ARM_Dynarmic::PageTableChanged() { | ||||
|     current_page_table = Memory::GetCurrentPageTable(); | ||||
| 
 | ||||
|     auto iter = jits.find(current_page_table); | ||||
|     if (iter != jits.end()) { | ||||
|         jit = iter->second.get(); | ||||
|         return; | ||||
|     } | ||||
| 
 | ||||
|     jit = new Dynarmic::Jit(GetUserCallbacks(interpreter_state, current_page_table)); | ||||
|     jits.emplace(current_page_table, std::unique_ptr<Dynarmic::Jit>(jit)); | ||||
| } | ||||
|  |  | |||
|  | @ -4,12 +4,17 @@ | |||
| 
 | ||||
| #pragma once | ||||
| 
 | ||||
| #include <map> | ||||
| #include <memory> | ||||
| #include <dynarmic/dynarmic.h> | ||||
| #include "common/common_types.h" | ||||
| #include "core/arm/arm_interface.h" | ||||
| #include "core/arm/skyeye_common/armstate.h" | ||||
| 
 | ||||
| namespace Memory { | ||||
| struct PageTable; | ||||
| } // namespace Memory
 | ||||
| 
 | ||||
| class ARM_Dynarmic final : public ARM_Interface { | ||||
| public: | ||||
|     ARM_Dynarmic(PrivilegeMode initial_mode); | ||||
|  | @ -36,8 +41,11 @@ public: | |||
|     void ExecuteInstructions(int num_instructions) override; | ||||
| 
 | ||||
|     void ClearInstructionCache() override; | ||||
|     void PageTableChanged() override; | ||||
| 
 | ||||
| private: | ||||
|     std::unique_ptr<Dynarmic::Jit> jit; | ||||
|     Dynarmic::Jit* jit = nullptr; | ||||
|     Memory::PageTable* current_page_table = nullptr; | ||||
|     std::map<Memory::PageTable*, std::unique_ptr<Dynarmic::Jit>> jits; | ||||
|     std::shared_ptr<ARMul_State> interpreter_state; | ||||
| }; | ||||
|  |  | |||
|  | @ -25,6 +25,10 @@ void ARM_DynCom::ClearInstructionCache() { | |||
|     trans_cache_buf_top = 0; | ||||
| } | ||||
| 
 | ||||
| void ARM_DynCom::PageTableChanged() { | ||||
|     ClearInstructionCache(); | ||||
| } | ||||
| 
 | ||||
| void ARM_DynCom::SetPC(u32 pc) { | ||||
|     state->Reg[15] = pc; | ||||
| } | ||||
|  |  | |||
|  | @ -16,6 +16,7 @@ public: | |||
|     ~ARM_DynCom(); | ||||
| 
 | ||||
|     void ClearInstructionCache() override; | ||||
|     void PageTableChanged() override; | ||||
| 
 | ||||
|     void SetPC(u32 pc) override; | ||||
|     u32 GetPC() const override; | ||||
|  |  | |||
|  | @ -9,6 +9,8 @@ | |||
| #include "common/common_types.h" | ||||
| #include "common/logging/log.h" | ||||
| #include "common/swap.h" | ||||
| #include "core/arm/arm_interface.h" | ||||
| #include "core/core.h" | ||||
| #include "core/hle/kernel/memory.h" | ||||
| #include "core/hle/kernel/process.h" | ||||
| #include "core/hle/lock.h" | ||||
|  | @ -26,6 +28,9 @@ static PageTable* current_page_table = nullptr; | |||
| 
 | ||||
| void SetCurrentPageTable(PageTable* page_table) { | ||||
|     current_page_table = page_table; | ||||
|     if (Core::System::GetInstance().IsPoweredOn()) { | ||||
|         Core::CPU().PageTableChanged(); | ||||
|     } | ||||
| } | ||||
| 
 | ||||
| PageTable* GetCurrentPageTable() { | ||||
|  |  | |||
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