Forks/citra
1
0
Fork 0
mirror of https://github.com/PabloMK7/citra.git synced 2025-10-30 21:30:04 +00:00
Code Issues Projects Releases Packages Wiki Activity

Merge pull request #728 from lioncash/vars

Browse source 
dyncom: Remove an unnecessary variable in the interpreter
This commit is contained in:
Lioncash 2015-05-07 21:09:03 -04:00
commit 1622068198
1 changed files with 17 additions and 19 deletions
Download patch file Download diff file Expand all files Collapse all files

36
src/core/arm/dyncom/arm_dyncom_interpreter.cpp
View file

@ -3672,7 +3672,7 @@ static int clz(unsigned int x) {
return n; return n;
} }
unsigned InterpreterMainLoop(ARMul_State* state) { unsigned InterpreterMainLoop(ARMul_State* cpu) {
Common::Profiling::ScopeTimer timer_execute(profile_execute); Common::Profiling::ScopeTimer timer_execute(profile_execute);
#undef RM #undef RM
@ -3930,8 +3930,6 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
#define PC (cpu->Reg[15]) #define PC (cpu->Reg[15])
#define CHECK_EXT_INT if (!cpu->NirqSig && !(cpu->Cpsr & 0x80)) goto END; #define CHECK_EXT_INT if (!cpu->NirqSig && !(cpu->Cpsr & 0x80)) goto END;
ARMul_State* cpu = state;
// GCC and Clang have a C++ extension to support a lookup table of labels. Otherwise, fallback // GCC and Clang have a C++ extension to support a lookup table of labels. Otherwise, fallback
// to a clunky switch statement. // to a clunky switch statement.
#if defined __GNUC__ || defined __clang__ #if defined __GNUC__ || defined __clang__
@ -6492,24 +6490,24 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
s16 sum4 = ((rn_val >> 24) & 0xFF) + ((rm_val >> 24) & 0xFF); s16 sum4 = ((rn_val >> 24) & 0xFF) + ((rm_val >> 24) & 0xFF);
if (sum1 >= 0x100) if (sum1 >= 0x100)
state->Cpsr |= (1 << 16); cpu->Cpsr |= (1 << 16);
else else
state->Cpsr &= ~(1 << 16); cpu->Cpsr &= ~(1 << 16);
if (sum2 >= 0x100) if (sum2 >= 0x100)
state->Cpsr |= (1 << 17); cpu->Cpsr |= (1 << 17);
else else
state->Cpsr &= ~(1 << 17); cpu->Cpsr &= ~(1 << 17);
if (sum3 >= 0x100) if (sum3 >= 0x100)
state->Cpsr |= (1 << 18); cpu->Cpsr |= (1 << 18);
else else
state->Cpsr &= ~(1 << 18); cpu->Cpsr &= ~(1 << 18);
if (sum4 >= 0x100) if (sum4 >= 0x100)
state->Cpsr |= (1 << 19); cpu->Cpsr |= (1 << 19);
else else
state->Cpsr &= ~(1 << 19); cpu->Cpsr &= ~(1 << 19);
lo_result = ((sum1 & 0xFF) | (sum2 & 0xFF) << 8); lo_result = ((sum1 & 0xFF) | (sum2 & 0xFF) << 8);
hi_result = ((sum3 & 0xFF) | (sum4 & 0xFF) << 8); hi_result = ((sum3 & 0xFF) | (sum4 & 0xFF) << 8);
@ -6522,24 +6520,24 @@ unsigned InterpreterMainLoop(ARMul_State* state) {
s16 diff4 = ((rn_val >> 24) & 0xFF) - ((rm_val >> 24) & 0xFF); s16 diff4 = ((rn_val >> 24) & 0xFF) - ((rm_val >> 24) & 0xFF);
if (diff1 >= 0) if (diff1 >= 0)
state->Cpsr |= (1 << 16); cpu->Cpsr |= (1 << 16);
else else
state->Cpsr &= ~(1 << 16); cpu->Cpsr &= ~(1 << 16);
if (diff2 >= 0) if (diff2 >= 0)
state->Cpsr |= (1 << 17); cpu->Cpsr |= (1 << 17);
else else
state->Cpsr &= ~(1 << 17); cpu->Cpsr &= ~(1 << 17);
if (diff3 >= 0) if (diff3 >= 0)
state->Cpsr |= (1 << 18); cpu->Cpsr |= (1 << 18);
else else
state->Cpsr &= ~(1 << 18); cpu->Cpsr &= ~(1 << 18);
if (diff4 >= 0) if (diff4 >= 0)
state->Cpsr |= (1 << 19); cpu->Cpsr |= (1 << 19);
else else
state->Cpsr &= ~(1 << 19); cpu->Cpsr &= ~(1 << 19);
lo_result = (diff1 & 0xFF) | ((diff2 & 0xFF) << 8); lo_result = (diff1 & 0xFF) | ((diff2 & 0xFF) << 8);
hi_result = (diff3 & 0xFF) | ((diff4 & 0xFF) << 8); hi_result = (diff3 & 0xFF) | ((diff4 & 0xFF) << 8);