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	Merge pull request #1624 from JayFoxRox/buffer-allow-write
Implement buffer-write allow registers
This commit is contained in:
		
						commit
						069e040500
					
				
					 4 changed files with 78 additions and 12 deletions
				
			
		|  | @ -578,7 +578,17 @@ struct Regs { | ||||||
|     } |     } | ||||||
| 
 | 
 | ||||||
|     struct { |     struct { | ||||||
|         INSERT_PADDING_WORDS(0x6); |         INSERT_PADDING_WORDS(0x3); | ||||||
|  | 
 | ||||||
|  |         union { | ||||||
|  |             BitField<0, 4, u32> allow_color_write; // 0 = disable, else enable
 | ||||||
|  |         }; | ||||||
|  | 
 | ||||||
|  |         INSERT_PADDING_WORDS(0x1); | ||||||
|  | 
 | ||||||
|  |         union { | ||||||
|  |             BitField<0, 2, u32> allow_depth_stencil_write; // 0 = disable, else enable
 | ||||||
|  |         }; | ||||||
| 
 | 
 | ||||||
|         DepthFormat depth_format; // TODO: Should be a BitField!
 |         DepthFormat depth_format; // TODO: Should be a BitField!
 | ||||||
|         BitField<16, 3, ColorFormat> color_format; |         BitField<16, 3, ColorFormat> color_format; | ||||||
|  |  | ||||||
|  | @ -809,7 +809,8 @@ static void ProcessTriangleInternal(const Shader::OutputVertex& v0, | ||||||
| 
 | 
 | ||||||
|             auto UpdateStencil = [stencil_test, x, y, &old_stencil](Pica::Regs::StencilAction action) { |             auto UpdateStencil = [stencil_test, x, y, &old_stencil](Pica::Regs::StencilAction action) { | ||||||
|                 u8 new_stencil = PerformStencilAction(action, old_stencil, stencil_test.reference_value); |                 u8 new_stencil = PerformStencilAction(action, old_stencil, stencil_test.reference_value); | ||||||
|                 SetStencil(x >> 4, y >> 4, (new_stencil & stencil_test.write_mask) | (old_stencil & ~stencil_test.write_mask)); |                 if (g_state.regs.framebuffer.allow_depth_stencil_write != 0) | ||||||
|  |                     SetStencil(x >> 4, y >> 4, (new_stencil & stencil_test.write_mask) | (old_stencil & ~stencil_test.write_mask)); | ||||||
|             }; |             }; | ||||||
| 
 | 
 | ||||||
|             if (stencil_action_enable) { |             if (stencil_action_enable) { | ||||||
|  | @ -909,7 +910,7 @@ static void ProcessTriangleInternal(const Shader::OutputVertex& v0, | ||||||
|                 } |                 } | ||||||
|             } |             } | ||||||
| 
 | 
 | ||||||
|             if (output_merger.depth_write_enable) |             if (regs.framebuffer.allow_depth_stencil_write != 0 && output_merger.depth_write_enable) | ||||||
|                 SetDepth(x >> 4, y >> 4, z); |                 SetDepth(x >> 4, y >> 4, z); | ||||||
| 
 | 
 | ||||||
|             // The stencil depth_pass action is executed even if depth testing is disabled
 |             // The stencil depth_pass action is executed even if depth testing is disabled
 | ||||||
|  | @ -1133,7 +1134,8 @@ static void ProcessTriangleInternal(const Shader::OutputVertex& v0, | ||||||
|                 output_merger.alpha_enable ? blend_output.a() : dest.a() |                 output_merger.alpha_enable ? blend_output.a() : dest.a() | ||||||
|             }; |             }; | ||||||
| 
 | 
 | ||||||
|             DrawPixel(x >> 4, y >> 4, result); |             if (regs.framebuffer.allow_color_write != 0) | ||||||
|  |                 DrawPixel(x >> 4, y >> 4, result); | ||||||
|         } |         } | ||||||
|     } |     } | ||||||
| } | } | ||||||
|  |  | ||||||
|  | @ -153,6 +153,9 @@ void RasterizerOpenGL::Reset() { | ||||||
|     SyncLogicOp(); |     SyncLogicOp(); | ||||||
|     SyncStencilTest(); |     SyncStencilTest(); | ||||||
|     SyncDepthTest(); |     SyncDepthTest(); | ||||||
|  |     SyncColorWriteMask(); | ||||||
|  |     SyncStencilWriteMask(); | ||||||
|  |     SyncDepthWriteMask(); | ||||||
| 
 | 
 | ||||||
|     SetShader(); |     SetShader(); | ||||||
| 
 | 
 | ||||||
|  | @ -268,15 +271,36 @@ void RasterizerOpenGL::NotifyPicaRegisterChanged(u32 id) { | ||||||
|         state.draw.shader_dirty = true; |         state.draw.shader_dirty = true; | ||||||
|         break; |         break; | ||||||
| 
 | 
 | ||||||
|     // Stencil test
 |     // Sync GL stencil test + stencil write mask
 | ||||||
|  |     // (Pica stencil test function register also contains a stencil write mask)
 | ||||||
|     case PICA_REG_INDEX(output_merger.stencil_test.raw_func): |     case PICA_REG_INDEX(output_merger.stencil_test.raw_func): | ||||||
|  |         SyncStencilTest(); | ||||||
|  |         SyncStencilWriteMask(); | ||||||
|  |         break; | ||||||
|     case PICA_REG_INDEX(output_merger.stencil_test.raw_op): |     case PICA_REG_INDEX(output_merger.stencil_test.raw_op): | ||||||
|  |     case PICA_REG_INDEX(framebuffer.depth_format): | ||||||
|         SyncStencilTest(); |         SyncStencilTest(); | ||||||
|         break; |         break; | ||||||
| 
 | 
 | ||||||
|     // Depth test
 |     // Sync GL depth test + depth and color write mask
 | ||||||
|  |     // (Pica depth test function register also contains a depth and color write mask)
 | ||||||
|     case PICA_REG_INDEX(output_merger.depth_test_enable): |     case PICA_REG_INDEX(output_merger.depth_test_enable): | ||||||
|         SyncDepthTest(); |         SyncDepthTest(); | ||||||
|  |         SyncDepthWriteMask(); | ||||||
|  |         SyncColorWriteMask(); | ||||||
|  |         break; | ||||||
|  | 
 | ||||||
|  |     // Sync GL depth and stencil write mask
 | ||||||
|  |     // (This is a dedicated combined depth / stencil write-enable register)
 | ||||||
|  |     case PICA_REG_INDEX(framebuffer.allow_depth_stencil_write): | ||||||
|  |         SyncDepthWriteMask(); | ||||||
|  |         SyncStencilWriteMask(); | ||||||
|  |         break; | ||||||
|  | 
 | ||||||
|  |     // Sync GL color write mask
 | ||||||
|  |     // (This is a dedicated color write-enable register)
 | ||||||
|  |     case PICA_REG_INDEX(framebuffer.allow_color_write): | ||||||
|  |         SyncColorWriteMask(); | ||||||
|         break; |         break; | ||||||
| 
 | 
 | ||||||
|     // Logic op
 |     // Logic op
 | ||||||
|  | @ -880,13 +904,39 @@ void RasterizerOpenGL::SyncLogicOp() { | ||||||
|     state.logic_op = PicaToGL::LogicOp(Pica::g_state.regs.output_merger.logic_op); |     state.logic_op = PicaToGL::LogicOp(Pica::g_state.regs.output_merger.logic_op); | ||||||
| } | } | ||||||
| 
 | 
 | ||||||
|  | void RasterizerOpenGL::SyncColorWriteMask() { | ||||||
|  |     const auto& regs = Pica::g_state.regs; | ||||||
|  | 
 | ||||||
|  |     auto IsColorWriteEnabled = [&](u32 value) { | ||||||
|  |         return (regs.framebuffer.allow_color_write != 0 && value != 0) ? GL_TRUE : GL_FALSE; | ||||||
|  |     }; | ||||||
|  | 
 | ||||||
|  |     state.color_mask.red_enabled = IsColorWriteEnabled(regs.output_merger.red_enable); | ||||||
|  |     state.color_mask.green_enabled = IsColorWriteEnabled(regs.output_merger.green_enable); | ||||||
|  |     state.color_mask.blue_enabled = IsColorWriteEnabled(regs.output_merger.blue_enable); | ||||||
|  |     state.color_mask.alpha_enabled = IsColorWriteEnabled(regs.output_merger.alpha_enable); | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | void RasterizerOpenGL::SyncStencilWriteMask() { | ||||||
|  |     const auto& regs = Pica::g_state.regs; | ||||||
|  |     state.stencil.write_mask = (regs.framebuffer.allow_depth_stencil_write != 0) | ||||||
|  |                              ? static_cast<GLuint>(regs.output_merger.stencil_test.write_mask) | ||||||
|  |                              : 0; | ||||||
|  | } | ||||||
|  | 
 | ||||||
|  | void RasterizerOpenGL::SyncDepthWriteMask() { | ||||||
|  |     const auto& regs = Pica::g_state.regs; | ||||||
|  |     state.depth.write_mask = (regs.framebuffer.allow_depth_stencil_write != 0 && regs.output_merger.depth_write_enable) | ||||||
|  |                            ? GL_TRUE | ||||||
|  |                            : GL_FALSE; | ||||||
|  | } | ||||||
|  | 
 | ||||||
| void RasterizerOpenGL::SyncStencilTest() { | void RasterizerOpenGL::SyncStencilTest() { | ||||||
|     const auto& regs = Pica::g_state.regs; |     const auto& regs = Pica::g_state.regs; | ||||||
|     state.stencil.test_enabled = regs.output_merger.stencil_test.enable && regs.framebuffer.depth_format == Pica::Regs::DepthFormat::D24S8; |     state.stencil.test_enabled = regs.output_merger.stencil_test.enable && regs.framebuffer.depth_format == Pica::Regs::DepthFormat::D24S8; | ||||||
|     state.stencil.test_func = PicaToGL::CompareFunc(regs.output_merger.stencil_test.func); |     state.stencil.test_func = PicaToGL::CompareFunc(regs.output_merger.stencil_test.func); | ||||||
|     state.stencil.test_ref = regs.output_merger.stencil_test.reference_value; |     state.stencil.test_ref = regs.output_merger.stencil_test.reference_value; | ||||||
|     state.stencil.test_mask = regs.output_merger.stencil_test.input_mask; |     state.stencil.test_mask = regs.output_merger.stencil_test.input_mask; | ||||||
|     state.stencil.write_mask = regs.output_merger.stencil_test.write_mask; |  | ||||||
|     state.stencil.action_stencil_fail = PicaToGL::StencilOp(regs.output_merger.stencil_test.action_stencil_fail); |     state.stencil.action_stencil_fail = PicaToGL::StencilOp(regs.output_merger.stencil_test.action_stencil_fail); | ||||||
|     state.stencil.action_depth_fail = PicaToGL::StencilOp(regs.output_merger.stencil_test.action_depth_fail); |     state.stencil.action_depth_fail = PicaToGL::StencilOp(regs.output_merger.stencil_test.action_depth_fail); | ||||||
|     state.stencil.action_depth_pass = PicaToGL::StencilOp(regs.output_merger.stencil_test.action_depth_pass); |     state.stencil.action_depth_pass = PicaToGL::StencilOp(regs.output_merger.stencil_test.action_depth_pass); | ||||||
|  | @ -898,11 +948,6 @@ void RasterizerOpenGL::SyncDepthTest() { | ||||||
|                                regs.output_merger.depth_write_enable == 1; |                                regs.output_merger.depth_write_enable == 1; | ||||||
|     state.depth.test_func = regs.output_merger.depth_test_enable == 1 ? |     state.depth.test_func = regs.output_merger.depth_test_enable == 1 ? | ||||||
|                             PicaToGL::CompareFunc(regs.output_merger.depth_test_func) : GL_ALWAYS; |                             PicaToGL::CompareFunc(regs.output_merger.depth_test_func) : GL_ALWAYS; | ||||||
|     state.color_mask.red_enabled = regs.output_merger.red_enable; |  | ||||||
|     state.color_mask.green_enabled = regs.output_merger.green_enable; |  | ||||||
|     state.color_mask.blue_enabled = regs.output_merger.blue_enable; |  | ||||||
|     state.color_mask.alpha_enabled = regs.output_merger.alpha_enable; |  | ||||||
|     state.depth.write_mask = regs.output_merger.depth_write_enable ? GL_TRUE : GL_FALSE; |  | ||||||
| } | } | ||||||
| 
 | 
 | ||||||
| void RasterizerOpenGL::SyncCombinerColor() { | void RasterizerOpenGL::SyncCombinerColor() { | ||||||
|  |  | ||||||
|  | @ -344,6 +344,15 @@ private: | ||||||
|     /// Syncs the logic op states to match the PICA register
 |     /// Syncs the logic op states to match the PICA register
 | ||||||
|     void SyncLogicOp(); |     void SyncLogicOp(); | ||||||
| 
 | 
 | ||||||
|  |     /// Syncs the color write mask to match the PICA register state
 | ||||||
|  |     void SyncColorWriteMask(); | ||||||
|  | 
 | ||||||
|  |     /// Syncs the stencil write mask to match the PICA register state
 | ||||||
|  |     void SyncStencilWriteMask(); | ||||||
|  | 
 | ||||||
|  |     /// Syncs the depth write mask to match the PICA register state
 | ||||||
|  |     void SyncDepthWriteMask(); | ||||||
|  | 
 | ||||||
|     /// Syncs the stencil test states to match the PICA register
 |     /// Syncs the stencil test states to match the PICA register
 | ||||||
|     void SyncStencilTest(); |     void SyncStencilTest(); | ||||||
| 
 | 
 | ||||||
|  |  | ||||||
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